Analog continuous-time recurrent decision circuit with high signal-voltage symmetry and delay-time equality. - Akira Hirose 001; Kazuhiko Nakazawa (ISCAS (5), 2003)

Analog recurrent decision circuit with high signal-voltage symmetry and delay-time equality to improve continuous-time convergence performance. - Akira Hirose 001; Kazuhiko Nakazawa (IEEE Trans. Neural Networks, 2003)