A circuit technology for sub-10-ns ECL 4-Mb BiCMOS DRAM's. - Takayuki Kawahara; Yoshiki Kawajiri; Goro Kitsukawa; Yoshinobu Nakagome; Kazuhiko Sagara; Yoshifumi Kawamoto; Takesada Akiba; Shisei Kato; Yasushi Kawase; Kiyoo Itoh 001 (IEEE J. Solid State Circuits, 1991)

Deep-submicrometer BiCMOS circuit technology for sub-10-ns ECL 4-Mb DRAM's. - Takayuki Kawahara; Yoshiki Kawajiri; Goro Kitsukawa; Kazuhiko Sagara; Yoshifumi Kawamoto; Takesada Akiba; Shisei Kato; Yasushi Kawase; Kiyoo Itoh 001 (IEEE J. Solid State Circuits, 1992)

256-Mb DRAM circuit technologies for file applications. - Goro Kitsukawa; Masashi Horiguchi; Yoshiki Kawajiri; Takayuki Kawahara; Takesada Akiba; Yasushi Kawase; Toshikazu Tachibana; Takeshi Sakai; Masakazu Aoki; Syoji Shukuri; Kazuhiko Sagara; Ryo Nagai; et al. (IEEE J. Solid State Circuits, 1993)

A Distributed Authentication Platform Architecture for Peer-to-Peer Applications. - Kazuhiko Sagara; Kenya Nishiki; Minoru Koizumi (IEICE Trans. Commun., 2005)

Perceptual interaction of optical BCI applications. - Kei Utsugi; Akiko Obata; Hiroki Sato; Takusige Katura; Kazuhiko Sagara; Atsushi Maki; Hideaki Koizumi (SIGGRAPH Posters, 2007)

Special Section on Brain Communication. - Kazuhiko Sagara (IEICE Trans. Commun., 2008)

GO-STOP Control Using Optical Brain-Computer Interface during Calculation Task. - Kei Utsugi; Akiko Obata; Hiroki Sato; Ryuta Aoki; Atsushi Maki; Hideaki Koizumi; Kazuhiko Sagara; Hiroaki Kawamichi; Hirokazu Atsumori; Takusige Katura (IEICE Trans. Commun., 2008)

Evaluation of a 2-Channel NIRS-Based Optical Brain Switch for Motor Disabilities' Communication Tools. - Kazuhiko Sagara; Kunihiko Kido (IEICE Trans. Inf. Syst., 2012)