Delay-optimal wiring plan for the microprocessor of high performance computing machines. - Jun Kikuchi; Tetsuo Sasaki; Tohru Hashimoto; Kazuhisa Miyamoto (ASP-DAC, 2000)

Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS. - Tamotsu Miyake; Takeo Yamashita; Norikatsu Asari; Hideki Sekisaka; Tom Sakai; Kazuhiro Matsuura; Atsushi Wakahara; Hideyuki Takahashi; Tom Hiyama; Kazuhisa Miyamoto; Kazutaka Mori (CICC, 2001)