Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device. - Motoki Amagasaki; Takurou Shimokawa; Kazunori Matsuyama; Ryoichi Yamaguchi; Hideaki Nakayama; Naoto Hamabe; Masahiro Iida; Toshinori Sueyoshi (VLSI-SoC, 2006)

Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping. - Kazunori Matsuyama; Motoki Amagasaki; Hideaki Nakayama; Ryoichi Yamaguchi; Masahiro Iida; Toshinori Sueyoshi (ARC, 2007)

A Variable Grain Logic Cell Architecture for Reconfigurable Logic Cores. - Motoki Amagasaki; Ryoichi Yamaguchi; Kazunori Matsuyama; Masahiro Iida; Toshinori Sueyoshi (FPL, 2007)

An Embedded Reconfigurable Logic Core based on Variable Grain Logic Cell Architecture. - Yoshiaki Satou; Motoki Amagasaki; Hiroshi Miura; Kazunori Matsuyama; Ryoichi Yamaguchi; Masahiro Iida; Toshinori Sueyoshi (FPT, 2007)