Splicing of Single-Mode Optical Fibers and Jointing of Fiber Cables. - Shigeru Tachigami; Shozo Inao; Hisaharu Yanagawa; Kazunori Watanabe; Yoshio Tsuchida; Isao Minamida (ICC (3), 1984)

An adaptive array antenna using combined DFT and LMS algorithms. - Kazunori Watanabe; Isamu Yoshii; Ryuji Kohno (PIMRC, 1998)

0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS. - Yasuyuki Okuma; Koichi Ishida; Yoshikatsu Ryu; Xin Zhang 025; Po-Hung Chen; Kazunori Watanabe; Makoto Takamiya; Takayasu Sakurai (CICC, 2010)

0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS. - Yasuyuki Okuma; Koichi Ishida; Yoshikatsu Ryu; Xin Zhang 025; Po-Hung Chen; Kazunori Watanabe; Makoto Takamiya; Takayasu Sakurai (IEICE Trans. Electron., 2011)

2.1 Times increase of drain efficiency by dual supply voltage scheme in 315MHz class-F Power amplifier at output power of -20dBm. - Shunta Iguchi; Akira Saito; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (ESSCIRC, 2012)

0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS. - Akira Saito; Yun Fei Zheng; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (ISLPED, 2012)

An all 0.5V, 1Mbps, 315MHz OOK transceiver with 38-µW career-frequency-free intermittent sampling receiver and 52-µW class-F transmitter in 40-nm CMOS. - Akira Saito; Kentaro Honda; Yun Fei Zheng; Shunta Iguchi; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (VLSIC, 2012)

A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90% efficiency in load range from 2µW to 50µW. - Xin Zhang 025; Po-Hung Chen; Yoshikatsu Ryu; Koichi Ishida; Yasuyuki Okuma; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (VLSIC, 2012)

A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation. - Xin Zhang 025; Yu Pu; Koichi Ishida; Yoshikatsu Ryu; Yasuyuki Okuma; Po-Hung Chen; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

315MHz OOK transceiver with 38-µW receiver and 36-µW transmitter in 40-nm CMOS. - Shunta Iguchi; Akira Saito; Kentaro Honda; Yun Fei Zheng; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (ASP-DAC, 2013)

A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS. - Xin Zhang 025; Po-Hung Chen; Yoshikatsu Ryu; Koichi Ishida; Yasuyuki Okuma; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (ASP-DAC, 2013)

A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS. - Xin Zhang 025; Po-Hung Chen; Yasuyuki Okuma; Koichi Ishida; Yoshikatsu Ryu; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (IEEE J. Solid State Circuits, 2014)

Design Method of Class-F Power Amplifier With Output Power of -20 dBm and Efficient Dual Supply Voltage Transmitter. - Shunta Iguchi; Akira Saito; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)