A 170GB/s 16Mb Embedded DRAM with Data-Bus Charge-Recycling. - Kim Hardee; Michael Parris; O. Fred Jones; Doug Butler; Mike Mound; G. W. Jones; Tim Egging; Tomofumi Arakawa; Katsuhiko Sasahara; Kazuo Taniguchi; Masayuki Miyabayashi (ISSCC, 2008)

4.6 A 1/2.3inch 20Mpixel 3-layer stacked CMOS Image Sensor with DRAM. - Tsutomu Haruta; Tsutomu Nakajima; Jun Hashizume; Taku Umebayashi; Hiroshi Takahashi; Kazuo Taniguchi; Masami Kuroda; Hiroshi Sumihiro; Koji Enoki; Takatsugu Yamasaki; Katsuya Ikezawa; Atsushi Kitahara; et al. (ISSCC, 2017)