1200μm2 Physical Random-Number Generators Based on SiN MOSFET for Secure Smart-Card Application. - Mari Matsumoto; Shinichi Yasuda; Ryuji Ohba; Kazutaka Ikegami; Tetsufumi Tanamoto; Shinobu Fujita (ISSCC, 2008)

High-performance FPGA based on novel DSS-MOSFET and non-volatile configuration memory (abstract only). - Shinichi Yasuda; Tetsufumi Tanamoto; Kazutaka Ikegami; Atsuhiro Kinoshita; Keiko Abe; Hirotaka Nishino; Shinobu Fujita (FPGA, 2010)

Scalability of spin FPGA: A Reconfigurable Architecture based on spin MOSFET - Tetsufumi Tanamoto; Hideyuki Sugiyama; Tomoaki Inokuchi; Takao Marukame; Mizue Ishikawa; Kazutaka Ikegami; Yoshiaki Saito (CoRR, 2011)

Designing Nonvolatile Reconfigurable Switch-based FPGA through Overall Circuit Performance Evaluation. - Kazutaka Ikegami; Keiko Abe; Kumiko Nomura; Shinichi Yasuda; Masato Oda; Shinobu Fujita (IPDPS Workshops, 2012)

Novel STT-MRAM-based last level caches for high performance processors using normally-off architectures. - Shinobu Fujita; Hiroki Noguchi; Kazutaka Ikegami; Susumu Takeda; Kumiko Nomura; Keiko Abe (ISIC, 2014)

Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU. - Hiroki Noguchi; Kazutaka Ikegami; Naoharu Shimomura; Tetsufumi Tanamoto; Junichi Ito; Shinobu Fujita (VLSIC, 2014)

7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using physically eliminated read-disturb scheme and normally-off memory architecture. - Hiroki Noguchi; Kazutaka Ikegami; Keiichi Kushida; Keiko Abe; Shogo Itai; Satoshi Takaya; Naoharu Shimomura; Junichi Ito; Atsushi Kawasumi; Hiroyuki Hara; Shinobu Fujita (ISSCC, 2015)

7.2 4Mb STT-MRAM-based cache with memory-access-aware power optimization and write-verify-write / read-modify-write scheme. - Hiroki Noguchi; Kazutaka Ikegami; Satoshi Takaya; Eishi Arima; Keiichi Kushida; Atsushi Kawasumi; Hiroyuki Hara; Keiko Abe; Naoharu Shimomura; Junichi Ito; Shinobu Fujita; Takashi Nakada; et al. (ISSCC, 2016)

Novel memory hierarchy with e-STT-MRAM for near-future applications. - Shinobu Fujita; Hiroki Noguchi; Kazutaka Ikegami; Susumu Takeda; Kumiko Nomura; Keiko Abe (VLSI-DAT, 2017)

Circuit And Systems Based on Advanced MRAM for Near Future Computing Applications. - Shinobu Fujita; Satoshi Takaya; Susumu Takeda; Kazutaka Ikegami (VLSI Circuits, 2019)