Knowledge-based placement technique for printed wiring boards. - Gotaro Odawara; Kazuhiko Iijima; Kazutoshi Wakabayashi (DAC, 1985)

A resource sharing and control synthesis method for conditional branches. - Kazutoshi Wakabayashi; Takeshi Yoshimura (ICCAD, 1989)

Global Scheduling Independent of Control Dependencies Based on Condition Vectors. - Kazutoshi Wakabayashi; Hirohito Tanaka (DAC, 1992)

Multi-Level Logic Minimization Based on Multi-Signal Implications. - Masayuki Yuguchi; Yuichi Nakamura 002; Kazutoshi Wakabayashi; Tomoyuki Fujita (DAC, 1995)

Efficient throughput optimization of feedback linear computations using generalized Horner's scheme. - Jan M. Rabaey; Miodrag Potkonjak; Kazutoshi Wakabayashi (ICASSP, 1995)

Design-for-debugging of application specific designs. - Miodrag Potkonjak; Sujit Dey; Kazutoshi Wakabayashi (ICCAD, 1995)

Controller re-specification to minimize switching activity in controller/data path circuits. - Anand Raghunathan; Sujit Dey; Niraj K. Jha; Kazutoshi Wakabayashi (ISLPED, 1996)

Power Management Techniques for Control-Flow Intensive Designs. - Anand Raghunathan; Sujit Dey; Niraj K. Jha; Kazutoshi Wakabayashi (DAC, 1997)

C-based Synthesis Experiences with a Behavior Synthesizer, "Cyber". - Kazutoshi Wakabayashi (DATE, 1999)

Controller-based power management for control-flow intensive designs. - Sujit Dey; Anand Raghunathan; Niraj K. Jha; Kazutoshi Wakabayashi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Spatial-temporal mapping of real applications on a Dynamically Reconfigurable Logic Engine (DRLE) LSI. - Koichiro Furuta; Taro Fujii; Masato Motomura; Kazutoshi Wakabayashi; Masakazu Yamashina (CICC, 2000)

C-based SoC design flow and EDA tools: an ASIC and system vendorperspective. - Kazutoshi Wakabayashi; Takumi Okamoto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Property-specific witness graph generation for guided simulation. - Albert E. Casavant; Aarti Gupta; S. Liu; Akira Mukaiyama; Kazutoshi Wakabayashi; Pranav Ashar (DATE, 2001)

Property-Specific Testbench Generation for Guided Simulation. - Aarti Gupta; Albert E. Casavant; Pranav Ashar; Sean Liu; Akira Mukaiyama; Kazutoshi Wakabayashi (ASP-DAC/VLSI Design, 2002)

Study and Analysis of System LSI Design Methodologies Using C-Based Behavioral Synthesis. - Hidefumi Kurokawa; Hiroyuki Ikegami; Motohide Otsubo; Kiyoshi Asao; Kazuhisa Kirigaya; Katsuya Misu; Satoshi Takahashi; Tetsuji Kawatsu; Kouji Nitta; Hiroshi Ryu; Kazutoshi Wakabayashi; Minoru Tomobe; et al. (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

C-based behavioral synthesis and verification analysis on industrial design examples. - Kazutoshi Wakabayashi (ASP-DAC, 2004)

Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. - Noriaki Suzuki; Shunsuke Kurotaki; Masayasu Suzuki; Naoto Kaneko; Yutaka Yamada; Katsuaki Deguchi; Yohei Hasegawa; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takeo Toi; et al. (FCCM, 2004)

Stream applications on the dynamically reconfigurable processor. - Masayasu Suzuki; Yohei Hasegawa; Yutaka Yamada; Naoto Kaneko; Katsuaki Deguchi; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takao Toi; Toru Awashima (FPT, 2004)

Are we ready for system-level synthesis? - Jason Cong; Tony Ma; Ivo Bolsens; Phil Moorby; Jan M. Rabaey; John Sanguinetti; Kazutoshi Wakabayashi; Yoshi Watanabe (ASP-DAC, 2005)

System LSI design with C-based behavioral synthesis and verification. - Kazutoshi Wakabayashi (ISCAS (6), 2005)

High-level synthesis challenges and solutions for a dynamically reconfigurable processor. - Takao Toi; Noritsugu Nakamura; Yoshinosuke Kato; Toru Awashima; Kazutoshi Wakabayashi; Li Jing (ICCAD, 2006)

Unified Representation for Speculative Scheduling: Generalized Condition Vector. - Kazutoshi Wakabayashi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Synthesizing "Verification Aware" Models: Why and How? - Malay K. Ganai; Akira Mukaiyama; Aarti Gupta; Kazutoshi Wakabayashi (VLSI Design, 2007)

Max-Flow Scheduling in High-Level Synthesis. - Liangwei Ge; Song Chen 001; Kazutoshi Wakabayashi; Takashi Takenaka; Takeshi Yoshimura (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

The State of ESL Design [Roundtable]. - Reinaldo A. Bergamaschi; Luca Benini; Krisztián Flautner; Wido Kruijtzer; Alberto L. Sangiovanni-Vincentelli; Kazutoshi Wakabayashi (IEEE Des. Test Comput., 2008)

Design of complex image processing systems in ESL. - Benjamin Carrión Schäfer; Ashish Trambadia; Kazutoshi Wakabayashi (ASP-DAC, 2010)

Real-time multimedia with C compiler for Hardware. - Kazutoshi Wakabayashi (ESTIMedia, 2010)

Wire congestion aware synthesis for a dynamically reconfigurable processor. - Takao Toi; Takumi Okamoto; Toru Awashima; Kazutoshi Wakabayashi; Hideharu Amano (FPT, 2010)

Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems. - Shahin Golshan; Eli Bozorgzadeh; Benjamin Carrión Schäfer; Kazutoshi Wakabayashi; Houman Homayoun; Alexander V. Veidenbaum (ISLPED, 2010)

CODES+ISSS 2009 guest editors' introduction. - Wolfgang Rosenstiel; Kazutoshi Wakabayashi (Des. Autom. Embed. Syst., 2010)

Fixed Point Data Type Modeling for High Level Synthesis. - Benjamin Carrión Schäfer; Yusuke Iguchi; Wataru Takahashi 002; Shingo Nagatani; Kazutoshi Wakabayashi (IEICE Trans. Electron., 2010)

Foreword. - Kazutoshi Wakabayashi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor. - Takao Toi; Noritsugu Nakamura; Yoshinosuke Kato; Toru Awashima; Kazutoshi Wakabayashi (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Design Space Exploration Acceleration Through Operation Clustering. - Benjamin Carrión Schäfer; Kazutoshi Wakabayashi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor. - Takao Toi; Takumi Okamoto; Toru Awashima; Kazutoshi Wakabayashi; Hideharu Amano (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Precision tunable RTL macro-modelling cycle-accurate power estimation. - Benjamin Carrión Schäfer; Kazutoshi Wakabayashi (IET Comput. Digit. Tech., 2011)

Machine learning predictive modelling high-level synthesis design space exploration. - Benjamin Carrión Schäfer; Kazutoshi Wakabayashi (IET Comput. Digit. Tech., 2012)

Divide and conquer high-level synthesis design space exploration. - Benjamin Carrión Schäfer; Kazutoshi Wakabayashi (ACM Trans. Design Autom. Electr. Syst., 2012)

Reconfigurable chip advantage compared with GPGPU from the compiler perspective. - Kazutoshi Wakabayashi (FPT, 2013)

Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design. - Hiroaki Konoura; Dawood Alnajiar; Yukio Mitsuyama; Hiroyuki Ochi; Takashi Imagawa; Shinichi Noda; Kazutoshi Wakabayashi; Masanori Hashimoto; Takao Onoye (ReConFig, 2013)

Mapping complex algorithm into FPGA with High Level Synthesis reconfigurable chips with High Level Synthesis compared with CPU, GPGPU. - Kazutoshi Wakabayashi; Takashi Takenaka; Hiroaki Inoue (ASP-DAC, 2014)

Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing. - Hiroaki Konoura; Dawood Alnajiar; Yukio Mitsuyama; Hajime Shimada; Kazutoshi Kobayashi; Hiroyuki Kanbara; Hiroyuki Ochi; Takashi Imagawa; Kazutoshi Wakabayashi; Masanori Hashimoto; Takao Onoye; Hidetoshi Onodera (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

Reliability-configurable mixed-grained reconfigurable array compatible with high-level synthesis. - Masanori Hashimoto; Dawood Alnajiar; Hiroaki Konoura; Yukio Mitsuyama; Hajime Shimada; Kazutoshi Kobayashi; Hiroyuki Kanbara; Hiroyuki Ochi; Takashi Imagawa; Kazutoshi Wakabayashi; Takao Onoye; Hidetoshi Onodera (ASP-DAC, 2015)

A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch. - Junshi Hotate; Takashi Kishimoto; Toshiki Higashi; Hiroyuki Ochi; Ryutaro Doi; Munehiro Tada; Tadahiko Sugibayashi; Kazutoshi Wakabayashi; Hidetoshi Onodera; Yukio Mitsuyama; Masanori Hashimoto (FPL, 2016)

Range Limiter Using Connection Bounding Box for SA-Based Placement of Mixed-Grained Reconfigurable Architecture. - Takashi Kishimoto; Wataru Takahashi 002; Kazutoshi Wakabayashi; Hiroyuki Ochi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016)

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture. - Hiroki Hihara; Akira Iwasaki; Masanori Hashimoto; Hiroyuki Ochi; Yukio Mitsuyama; Hidetoshi Onodera; Hiroyuki Kanbara; Kazutoshi Wakabayashi; Tadahiko Sugibayashi; Takashi Takenaka; Hiromitsu Hada; Munehiro Tada; et al. (IEEE Embed. Syst. Lett., 2018)

Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars. - Hiroyuki Ochi; Kosei Yamaguchi; Tetsuaki Fujimoto; Junshi Hotate; Takashi Kishimoto; Toshiki Higashi; Takashi Imagawa; Ryutaro Doi; Munehiro Tada; Tadahiko Sugibayashi; Wataru Takahashi 002; Kazutoshi Wakabayashi; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Convolution Neural Network Development Support System using Approximation Methods to Evaluate Inference Accuracy and Memory Usage in an Embedded System. - Toki Matsumoto; Yukikazu Nakamoto; Ryota Yamamoto; Shinya Honda; Kazutoshi Wakabayashi (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI, 2019)

33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications. - Masanori Hashimoto; Xu Bai; Naoki Banno; Munehiro Tada; Toshitsugu Sakamoto; Jaehoon Yu; Ryutaro Doi; Yusuke Araki; Hidetoshi Onodera; Takashi Imagawa; Hiroyuki Ochi; Kazutoshi Wakabayashi; et al. (ISSCC, 2020)

A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool. - Hiroaki Suzuki; Wataru Takahashi 002; Kazutoshi Wakabayashi; Hideharu Amano (HEART, 2021)

ISP Parameter Optimization and FPGA Implementation for Object Detection in Low-Light Conditions. - Kento Mishima; Naoya Niwa; Kazutoshi Wakabayashi; Hiroe Iwasaki (COOL CHIPS, 2024)