Incremental Principal Component Analysis Based on Adaptive Accumulation Ratio. - Seiichi Ozawa; Kazuya Matsumoto; Shaoning Pang 001; Nikola K. Kasabov (ICONIP (1), 2008)

Matrix Inversion on the Cell/B.E. Processor. - Shodai Yokoyama; Kazuya Matsumoto; Stanislav G. Sedukhin (HPCC, 2009)

A Solution of the All-Pairs Shortest Paths Problem on the Cell Broadband Engine Processor. - Kazuya Matsumoto; Stanislav G. Sedukhin (IEICE Trans. Inf. Syst., 2009)

Matrix Multiply-Add in Min-plus Algebra on a Short-Vector SIMD Processor of Cell/B.E.. - Kazuya Matsumoto; Stanislav G. Sedukhin (ICNC, 2010)

Blocked All-Pairs Shortest Paths Algorithm for Hybrid CPU-GPU System. - Kazuya Matsumoto; Naohito Nakasato; Stanislav G. Sedukhin (HPCC, 2011)

Multi-level Optimization of Matrix Multiplication for GPU-equipped Systems. - Kazuya Matsumoto; Naohito Nakasato; Tomoya Sakai; Hideki Yahagi; Stanislav G. Sedukhin (ICCS, 2011)

Implementing a Code Generator for Fast Matrix Multiplication in OpenCL on the GPU. - Kazuya Matsumoto; Naohito Nakasato; Stanislav G. Sedukhin (MCSoC, 2012)

Performance Tuning of Matrix Multiplication in OpenCL on Different GPUs and CPUs. - Kazuya Matsumoto; Naohito Nakasato; Stanislav G. Sedukhin (SC Companion, 2012)

Blocked United Algorithm for the All-Pairs Shortest Paths Problem on Hybrid CPU-GPU Systems. - Kazuya Matsumoto; Naohito Nakasato; Stanislav G. Sedukhin (IEICE Trans. Inf. Syst., 2012)

Evaluation of FFT for GPU Cluster Using Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Hisafumi Fujii; Norihisa Fujita; Tetsuya Odajima; Kazuya Matsumoto; Taisuke Boku (CLUSTER, 2015)

Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Hisafumi Fujii; Norihisa Fujita; Tetsuya Odajima; Kazuya Matsumoto; Yuetsu Kodama; Taisuke Boku (CLUSTER, 2015)

Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication. - Kazuya Matsumoto; Toshihiro Hanawa; Yuetsu Kodama; Hisafumi Fujii; Taisuke Boku (IPDPS Workshops, 2015)

Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA. - Kazuya Matsumoto; Norihisa Fujita; Toshihiro Hanawa; Taisuke Boku (VECPAR, 2016)

Application of a communication-avoiding generalized minimal residual method to a gyrokinetic five dimensional eulerian code on many core platforms. - Yasuhiro Idomura; Takuya Ina; Akie Mayumi; Susumu Yamada; Kazuya Matsumoto; Yuuichi Asahi; Toshiyuki Imamura (ScalA@SC, 2017)

Effectiveness of performance tuning techniques for general matrix multiplication on the PEZY-SC2. - Kazuya Matsumoto; Naohito Nakasato; Toshiaki Hishinuma (HEART, 2019)

Brain-inspired Co-design of Algorithm/Architecture for CNN Accelerators. - Stanislav Sedukhin; Kazuya Matsumoto; Yoichi Tomioka (IIAI-AAI, 2019)

Implementation and performance evaluation of a communication-avoiding GMRES method for stencil-based code on GPU cluster. - Kazuya Matsumoto; Yasuhiro Idomura; Takuya Ina; Akie Mayumi; Susumu Yamada (J. Supercomput., 2019)

High Performance Software Systolic Array Computing of Multi-channel Convolution on a GPU. - Kazuya Matsumoto; Yoichi Tomioka; Stanislav Sedukhin (ICCSA (1), 2022)

Milling of TiBbm2 Particle Reinforced High-Modulus Steel. - Hideharu Kato; Kazuya Matsumoto; Yukio Ito; Shigehiko Sakamoto; Hitoshi Sumiya (Int. J. Autom. Technol., 2024)

TriADA: Massively Parallel Trilinear Matrix-by-Tensor Multiply-Add Algorithm and Device Architecture for the Acceleration of 3D Discrete Transformations. - Stanislav Sedukhin; Yoichi Tomioka; Kazuya Matsumoto; Yuichi Okuyama 001 (CoRR, 2025)