A small-area high-performance 512-point 2-dimensional FFT single-chip processor. - Naoto Miyamoto; Leo Karnan; Kazuyuki Maruo; Koji Kotani; Tadahiro Ohmi (ASP-DAC, 2004)

An image recognition processor using dynamically reconfigurable ALU. - Naoto Miyamoto; Koji Kotani; Kazuyuki Maruo; Tadahiro Ohmi (CICC, 2004)

A Dynamically-Reconfigurable Image Recognition Processor. - Kazuyuki Maruo; Masayoshi Ichikawa; Naoto Miyamoto; Leo Karnan; Takahiro J. Yamaguchi; Koji Kotani; Tadahiro Ohmi (IPDPS, 2004)

Enhancing Transition Fault Model for Delay Defect Diagnosis. - Wu-Tung Cheng; Brady Benware; Ruifeng Guo; Kun-Han Tsai; Takeo Kobayashi; Kazuyuki Maruo; Michinobu Nakao; Yoshiaki Fukui; Hideyuki Otake (ATS, 2008)