Ke Chen

Orcid: 0000-0003-0981-3166

Affiliations:
  • Northeastern University, Department of Electrical and Computer Engineering, Boston, MA, USA


According to our database1, Ke Chen authored at least 33 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Edge-Side Fine-Grained Sparse CNN Accelerator With Efficient Dynamic Pruning Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications.
IEEE Trans. Computers, February, 2024

2023
Exact and Approximate Squarers for Error-Tolerant Applications.
IEEE Trans. Computers, July, 2023

Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

Approximate Softmax Functions for Energy-Efficient Deep Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2023

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs.
IEEE Trans. Emerg. Top. Comput., 2023

MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

VLCP: A High-Performance FPGA-based CNN Accelerator with Vector-level Cluster Pruning.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate Computing.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Hardware-Efficient Accurate and Approximate FPGA Multipliers for Error-Tolerant Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

An Energy-efficient Approximate DCT Design for Image Processing (Invited).
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
GBC: An Energy-Efficient LSTM Accelerator With Gating Units Level Balanced Compression Strategy.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Editorial Special Issue on Circuits and Systems for Emerging Computing Paradigms.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A survey of approximate arithmetic circuits and blocks.
it Inf. Technol., 2022

HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

Energy-efficient Oriented Approximate Quantization Scheme for Fine-Grained Sparse Neural Network Acceleration.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Data Stream Oriented Fine-grained Sparse CNN Accelerator with Efficient Unstructured Pruning Strategy.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

An Energy-efficient and High-precision Approximate MAC with Distributed Arithmetic Circuits.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

PAxC: A Probabilistic-oriented Approximate Computing Methodology for ANNs.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

An Energy-Efficient Approximate Floating-Point Multipliers for Wireless Communications.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

Approximate Arithmetic Circuits: Design and Applications.
Proceedings of the Approximate Computing, 2022

2021
Reduced Precision Redundancy for Reliable Processing of Data.
IEEE Trans. Emerg. Top. Comput., 2021

Design of An Approximate FFT Processor Based on Approximate Complex Multipliers.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2020
Profile-Based Output Error Compensation for Approximate Arithmetic Circuits.
IEEE Trans. Circuits Syst., 2020

2019
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC).
IEEE Trans. Computers, 2019

2018
Design and Application of an Approximate 2-D Convolver with Error Compensation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Two Approximate Voting Schemes for Reliable Computing.
IEEE Trans. Computers, 2017

Partially universal modules for high performance logic circuit design.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Design and analysis of an approximate 2D convolver.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

2015
On the Restore Operation in MTJ-Based Nonvolatile SRAM Cells.
IEEE Trans. Very Large Scale Integr. Syst., 2015

On the Nonvolatile Performance of Flip-Flop/SRAM Cells With a Single MTJ.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Matrix multiplication by an inexact systolic array.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

An approximate voting scheme for reliable computing.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015


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