PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction. - Yi Dai; Ke Wu 003; Mingche Lai; Qiong Li; Dezun Dong (ICA3PP (1), 2019)

Network Congestion Avoidance through Packet-chaining Reservation. - Ke Wu 003; Dezun Dong; Cunlu Li; Shan Huang 002; Yi Dai (ICPP, 2019)

Reducing Tail Latency in Proactive Congestion Control via Moderate Speculation. - Dezun Dong; Ke Wu 003 (HPCC/DSS/SmartCity, 2020)

PAARD: Proximity-Aware All-Reduce Communication for Dragonfly Networks. - Junchao Ma; Dezun Dong; Cunlu Li; Ke Wu 003; Liquan Xiao (ISPA/BDCloud/SocialCom/SustainCom, 2021)

Evaluation of Topology-Aware All-Reduce Algorithm for Dragonfly Networks. - Junchao Ma; Dezun Dong; Cunlu Li; Ke Wu 003; Liquan Xiao (NPC, 2021)

THperf: Enabling Accurate Network Latency Measurement for Tianhe-2 System. - Yunyang Xu; Ke Wu 003; Dezun Dong; Cunlu Li; Liquan Xiao (HPCC/DSS/SmartCity/DependSys, 2022)

Revisiting network congestion avoidance through adaptive packet-chaining reservation. - Ke Wu 003; Dezun Dong; Cunlu Li; Weixia Xu (Comput. Networks, 2022)

DFR: Dynamic-thresold Fault-tolerant Routing for Fat Tree. - Binyan Lan; Fei Lei; Ke Wu 003; Dezun Dong (APNet, 2023)

DFAR: Dynamic-threshold Fault-tolerant Adaptive Routing for Fat Tree Networks. - Binyan Lan; Fei Lei; Dezun Dong; Ke Wu 003; Xiaoyun Zhang (ICPADS, 2023)

Roar: A Router Microarchitecture for In-network Allreduce. - Ruiqi Wang; Dezun Dong; Fei Lei; Junchao Ma; Ke Wu 003; Kai Lu 001 (ICS, 2023)

DRLAR: A deep reinforcement learning-based adaptive routing framework for network-on-chips. - Shaocong Wang; Xiaoyun Zhang; Changhong Wang; Ke Wu 003; Cunlu Li; Dezun Dong (Comput. Networks, 2024)

COER: A Network Interface Offloading Architecture for RDMA and Congestion Control Protocol Codesign. - Ke Wu 003; Dezun Dong; Weixia Xu (ACM Trans. Archit. Code Optim., 2024)

A lightweight RDMA connection protocol based on post-hoc confirmation. - Ke Wu 003; Dezun Dong; Weixia Xu (J. Parallel Distributed Comput., 2025)