Micro-architectural characterization of desktop cloud workloads. - Tao Jiang 010; Rui Hou 001; Lixin Zhang 002; Ke Zhang 017; Licheng Chen; Mingyu Chen 001; Ninghui Sun (IISWC, 2012)

sAXI: A High-Efficient Hardware Inter-Node Link in ARM Server for Remote Memory Access. - Ke Zhang 017; Yisong Chang; Lixin Zhang 002; Mingyu Chen 001; Lei Yu; Zhiwei Xu 002 (CCGrid, 2016)

Extending On-chip Interconnects for rack-level remote resource access. - Yisong Chang; Ke Zhang 017; Sally A. McKee; Lixin Zhang 002; Mingyu Chen 001; Liqiang Ren; Zhiwei Xu 002 (ICCD, 2016)

Co-DIMM: Inter-Socket Data Sharing via a Common DIMM Channel. - Ke Zhang 017; Lei Yu; Yisong Chang; Ran Zhao; Hongxia Zhang; Lixin Zhang 002; Mingyu Chen 001; Sally A. McKee (MEMSYS, 2016)

Titian2: a scalable system-level emulator with all programmability for datacenter servers in cloud computing. - Ke Zhang 017; Ran Zhao; Hongxia Zhang; Lei Yu; Yisong Chang; Zhao Zhang; Mingyu Chen 001 (UCC, 2016)

DoCE: Direct Extension of On-Chip Interconnects over Converged Ethernet for Rack-Scale Memory Sharing. - Yisong Chang; Ran Zhao; Lei Yu; Ke Zhang 017 (ETCD@ASPLOS, 2017)

On Retargeting the AI Programming Framework to New Hardwares. - Jiacheng Zhao; Yisong Chang; Denghui Li; Chunwei Xia; Huimin Cui; Ke Zhang 017; Xiaobing Feng 002 (NPC, 2018)

ZyForce: An FPGA-based Cloud Platform for Experimental Curriculum of Computer System in University of Chinese Academy of Sciences (Abstract Only). - Ke Zhang 017; Mingyu Chen 001; Yungang Bao (SIGCSE, 2018)

Evolution and Revolution of Computer Systems Courses with the Open RISC-V ISA. - Ke Zhang 017 (CompEd, 2019)

ZyCube: An In-House Mini-Cluster for Agilely Developing and Conducting Computer Systems Course Projects. - Ke Zhang 017; Yisong Chang; Mingyu Chen 001; Yungang Bao; Zhiwei Xu 002 (CompEd, 2019)

Engaging Heterogeneous FPGAs in the Cloud. - Ke Zhang 017; Yisong Chang; Mingyu Chen 001; Yungang Bao; Zhiwei Xu 002 (FPGA, 2019)

Computer Organization and Design Course with FPGA Cloud. - Ke Zhang 017; Yisong Chang; Mingyu Chen 001; Yungang Bao; Zhiwei Xu 002 (SIGCSE, 2019)

EdUCAS: An In-house CI/CD Platform with Cloud FPGAs for Agilely Conducting Computer Systems Course Projects. - Ke Zhang 017; Yisong Chang; Ran Zhao; Zelin Wang; Mingyu Chen 001; Yungang Bao; Zhiwei Xu 002 (ITiCSE (2), 2021)

Teaching Computer System Courses with an Online Large-Scale Method. - Ke Zhang 017; Congwu Zhang; Yisong Chang; Yungang Bao; Mingyu Chen 001; Longbing Zhang; Zhiwei Xu 002; Jonathan Gratch; Jian Zhang; Ninghui Sun (TALE, 2021)

Increasing Flexibility of Cloud FPGA Virtualization. - Jinjie Ruan; Yisong Chang; Ke Zhang 017; Kan Shi; Mingyu Chen 001; Yungang Bao (FPL, 2022)

FPL Demo: SERVE: Agile Hardware Development Platform with Cloud IDE and Cloud FPGAs. - Zelin Wang; Ke Zhang 017; Yisong Chang; Yanlong Yin; Yuxiao Chen 009; Ran Zhao; Songyue Wang; Mingyu Chen 001; Yungang Bao (FPL, 2022)

GraFF: A Multi-FPGA System with Memory Semantic Fabric for Scalable Graph Processing. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Liu 004; Ke Zhang 017; Mingyu Chen 001 (FPT, 2022)

Preliminary exploration of a competency model for open-source processor chip design talent. - Xiaochun Yang 003; Ke Zhang 017; Zihao Yu (ACM TUR-C, 2023)

Rethinking Design Paradigm of Graph Processing System with a CXL-like Memory Semantic Fabric. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Zhang 017; Mingyu Chen 001 (CCGrid, 2023)

REMU: Enabling Cost-Effective Checkpointing and Deterministic Replay in FPGA-based Emulation. - Yuxiao Chen 009; Yisong Chang; Ke Zhang 017; Mingyu Chen 001; Yungang Bao (ICCD, 2023)

Morpheus: An Adaptive DRAM Cache with Online Granularity Adjustment for Disaggregated Memory. - Xu Zhang 033; Tianyue Lu; Yisong Chang; Ke Zhang 017; Mingyu Chen 001 (ICCD, 2023)

XUNI: Virtual Machine Abstraction for Self-contained and Multi-tenant Cloud FPGAs. - Zelin Wang; Guiyuan Zhu; Yunhai Liu; Yisong Chang; Ke Zhang 017; Mingyu Chen 001 (FPGA, 2024)

DFabric: Scaling Out Data Parallel Applications with CXL-Ethernet Hybrid Interconnects. - Xu Zhang 033; Ke Liu 004; Yisong Chang; Hui Yuan; Xiaolong Zheng; Ke Zhang 017; Mingyu Chen 001 (CoRR, 2024)

DRack: A CXL-Disaggregated Rack Architecture to Boost Inter-Rack Communication. - Xu Zhang 033; Ke Liu 004; Yuan Hui; Xiaolong Zheng; Yisong Chang; Yizhou Shan; Guanghui Zhang; Ke Zhang 017; Yungang Bao; Mingyu Chen 001; Chenxi Wang (USENIX ATC, 2025)