USB2.0 Logic Built In Self Test Methodology. - Keanhong Boey; Kok Sing Yap; Wai Mun Ng (ATS, 2008)

Is the differential frequency-based attack effective against random delay insertion? - Yingxi Lu; Keanhong Boey; Máire O'Neill; John V. McCanny; Akashi Satoh (SiPS, 2009)

Random clock against differential power analysis. - Keanhong Boey; Yingxi Lu; Máire O'Neill; Roger F. Woods (APCCAS, 2010)

SEED masking implementations against power analysis attacks. - Yingxi Lu; Keanhong Boey; Philip Hodgers; Máire O'Neill (APCCAS, 2010)

Lightweight DPA resistant solution on FPGA to counteract power models. - Yingxi Lu; Keanhong Boey; Philip Hodgers; Máire O'Neill (FPT, 2010)

Security of AES Sbox designs to power analysis. - Keanhong Boey; Philip Hodgers; Yingxi Lu; Máire O'Neill; Roger F. Woods (ICECS, 2010)

Differential Power Analysis of CAST-128. - Keanhong Boey; Yingxi Lu; Máire O'Neill; Roger F. Woods (ISVLSI, 2010)

Power Spectral Density Side Channel Attack Overlapping Window Method. - Philip Hodgers; Keanhong Boey; Máire O'Neill (DSD, 2011)

How Resistant are Sboxes to Power Analysis Attacks? - Keanhong Boey; Máire O'Neill; Roger F. Woods (NTMS, 2011)

Variable window power spectral density attack. - Philip Hodgers; Keanhong Boey; Máire O'Neill (WIFS, 2011)

Design and implementation of GPIO subsystem using external foundry I/O buffer. - Eric Thian Aun Tan; Sabyasachi Mohapatra; Keanhong Boey (APCCAS, 2021)