Write Assist Circuit to Cater Reliability and Floating Bit Line Problem of Negative Bit Line Assist Technique for Single or Multiport Static Random Access Memory. - Kedar Janardan Dhori; Vinay Kumar; Harsh Rawat (IEEE Trans. Very Large Scale Integr. Syst., 2014)

A 6T-SRAM in 28nm FDSOI technology with Vmin of 0.52V using assisted read and write operation. - Ashish Kumar; Vinay Kumar; Dhori Kedar Janardan; G. S. Visweswaran; Kaushik Saha (ICICDT, 2015)

A CMOS 90nm 50Mhz Supply Noise Tolerant High Density 8T-NAND ROM. - Kedar Janardan Dhori; Vinay Kumar; Ashish Kumar (VLSID, 2015)

Temperature-based adaptive memory sub-system in 28nm UTBB FDSOI. - Amit Chhabra; Mudit Srivastava; Prakhar Raj Gupta; Kedar Janardan Dhori; Philippe Triolet; Thierry Di Gilio; Nitin Bansal; B. Sujatha (ISCAS, 2016)

High-yield design of high-density SRAM for low-voltage and low-leakage operations. - Kedar Janardan Dhori; Hitesh Chawla; Ashish Kumar; Prashant Pandey; Promod Kumar; Lorenzo Ciampolini; Florian Cacho; Damien Croain (DFT, 2017)

Diagnostic Circuit for Latent Fault Detection in SRAM Row Decoder. - Shivendra Singh; Varshita Gupta; Anuj Grover; Kedar Janardan Dhori (ISQED, 2020)

Circuit Monitoring Across Design Life-Cycle in 28nm FD-SOI and 40nm Bulk CMOS technologies. - Sylvain Clerc; Kedar Janardan Dhori; Robin M. Wilson; Rohit Goel; Sébastien Marchal; Franck Pourchon; Christian Dutto; Ricardo Gomez Gomez (ESSCIRC, 2021)

Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low Power SRAMs in 65nm LSTP CMOS. - Mukesh Kumar Srivastav; Rimjhim; Govind Soni; Umang Mittal; Rupali Tewari; Riya Yadav; Anuj Grover; Kedar Janardan Dhori; Harsh Rawat (ICECS, 2021)

3-Stage Pipelined Hierarchical SRAMs with Burst Mode Read in 65nm LSTP CMOS. - Mukesh Kumar Srivastav; Rimjhim; Roshan Mishra; Anuj Grover; Kedar Janardan Dhori; Harsh Rawat (ISCAS, 2022)

40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. - Kedar Janardan Dhori; Promod Kumar; Christophe Lecocq; Pascal Urard; Olivier Callen; Florian Cacho; Maryline Parra; Prashant Pandey; Daniel Noblet (VLSID, 2022)

Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOI. - Chandan Kumar; Rahul Kumar; Anuj Grover; Shouri Chatterjee; Kedar Janardan Dhori; Harsh Rawat (VLSID, 2022)