Design of Low Power ALU for RISC-VISA. - Keerthija Puli; Vikramkumar Pudi (iSES, 2023)

Design of Energy Efficient and Low Delay Posit Multiplier. - K. Lakshmi BhanuPrakash Reddy; Haripriya R. S; Keerthija Puli; Subba Ramkumar Reddy Annapalli; Vikramkumar Pudi (VLSID, 2023)

Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme. - Keerthija Puli; Vikramkumar Pudi (APCCAS, 2024)