On generation of properties from specification. - Keerthikumara Devarajegowda; Wolfgang Ecker (HLDVT, 2017)

Python based framework for HDSLs with an underlying formal semantics: (Invited paper). - Keerthikumara Devarajegowda; Johannes Schreiner; Rainer Findenig; Wolfgang Ecker (ICCAD, 2017)

The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. - Daniel Mueller-Gritschneder; Keerthikumara Devarajegowda; Martin Dittrich; Wolfgang Ecker; Marc Greim; Ulf Schlichtmann (RSP, 2017)

A Machine Learning Approach for Area Prediction of Hardware Designs from Abstract Specifications. - Elena Zennaro; Lorenzo Servadei; Keerthikumara Devarajegowda; Wolfgang Ecker (DSD, 2018)

Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning. - Lorenzo Servadei; Elena Zennaro; Keerthikumara Devarajegowda; Wolfgang Ecker; Robert Wille (CIMA@ICTAI, 2018)

Meta-model Based Automation of Properties for Pre-Silicon Verification. - Keerthikumara Devarajegowda; Wolfgang Ecker (VLSI-SoC, 2018)

Increasing Soft Error Resilience by Software Transformation. - Michael Werner; Keerthikumara Devarajegowda; Moomen Chaari; Wolfgang Ecker (DAC, 2019)

Embedded Systems' Automation following OMG's Model Driven Architecture Vision. - Wolfgang Ecker; Keerthikumara Devarajegowda; Michael Werner; Zhao Han; Lorenzo Servadei (DATE, 2019)

Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision. - Lorenzo Servadei; Elena Zennaro; Keerthikumara Devarajegowda; Martin Manzinger; Wolfgang Ecker; Robert Wille (DATE, 2019)

Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. - Eshan Singh; Keerthikumara Devarajegowda; Sebastian Simon; Ralf Schnieder; Karthik Ganesan 001; Mohammad Rahmani Fadiheh; Dominik Stoffel; Wolfgang Kunz; Clark W. Barrett; Wolfgang Ecker; Subhasish Mitra (DATE, 2019)

Formal Verification Methodology in an Industrial Setup. - Lorenzo Servadei; Zhao Han; Michael Werner; Wolfgang Ecker; Keerthikumara Devarajegowda (DSD, 2019)

How to Keep 4-Eyes Principle in a Design and Property Generation Flow. - Keerthikumara Devarajegowda; Wolfgang Ecker; Wolfgang Kunz (MBMV, 2019)

Towards a Python-Based One Language Ecosystem for Embedded Systems Automation. - Zhao Han; Keerthikumara Devarajegowda; Michael Werner; Wolfgang Ecker (NORCAS, 2019)

Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications. - Lorenzo Servadei; Elena Zennaro; Tobias Fritz; Keerthikumara Devarajegowda; Wolfgang Ecker; Robert Wille (Microprocess. Microsystems, 2019)

Gap-free Processor Verification by S2QED and Property Generation. - Keerthikumara Devarajegowda; Mohammad Rahmani Fadiheh; Eshan Singh; Clark W. Barrett; Subhasish Mitra; Wolfgang Ecker; Dominik Stoffel; Wolfgang Kunz (DATE, 2020)

Cost Estimation for Configurable Model-Driven SoC Designs Using Machine Learning. - Lorenzo Servadei; Edoardo Mosca; Keerthikumara Devarajegowda; Michael Werner; Wolfgang Ecker; Robert Wille (ACM Great Lakes Symposium on VLSI, 2020)

Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation. - Lorenzo Servadei; Edoardo Mosca; Elena Zennaro; Keerthikumara Devarajegowda; Michael Werner; Wolfgang Ecker; Robert Wille (IEEE Trans. Computers, 2020)

ISA Modeling with Trace Notation for Context Free Property Generation. - Keerthikumara Devarajegowda; Endri Kaja; Sebastian Siegfried Prebeck; Wolfgang Ecker (DAC, 2021)

Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. - Endri Kaja; Nicolas Gerlin; Mounika Vaddeboina; Luis Rivas; Sebastian Siegfried Prebeck; Zhao Han; Keerthikumara Devarajegowda; Wolfgang Ecker (DFT, 2021)

On Self-Verifying DSL Generation for Embedded Systems Automation. - Zhao Han; Shahzaib Qazi; Michael Werner; Keerthikumara Devarajegowda; Wolfgang Ecker (MBMV, 2021)

Extending Verilator to Enable Fault Simulation. - Endri Kaja; Nicolas Ojeda Leon; Michael Werner; Bogdan-Andrei Tabacaru; Keerthikumara Devarajegowda; Wolfgang Ecker (MBMV, 2021)

Transformative Hardware Design Following the Model-Driven Architecture Vision. - Zhao Han; Gabriel Rutsch; Deyan Wang; Bowen Li; Sebastian Siegfried Prebeck; Daniela Sanchez Lopera; Keerthikumara Devarajegowda; Wolfgang Ecker (VLSI-SoC (Selected Papers), 2021)

Aspect-Oriented Design Automation with Model Transformation. - Zhao Han; Deyan Wang; Gabriel Rutsch; Bowen Li; Sebastian Siegfried Prebeck; Daniela Sanchez Lopera; Keerthikumara Devarajegowda; Wolfgang Ecker (VLSI-SoC, 2021)

Model-based Generation of Assertions for Pre-silicon Verification. - Keerthikumara Devarajegowda (2021)

MetaFS: Model-driven Fault Simulation Framework. - Endri Kaja; Nicolas Gerlin; Monideep Bora; Keerthikumara Devarajegowda; Dominik Stoffel; Wolfgang Kunz; Wolfgang Ecker (DFT, 2022)

A Scalable, Configurable and Programmable Vector Dot-Product Unit for Edge AI. - Sebastian Prebeck; Sathya Ashok; Mounika Vaddeboina; Keerthikumara Devarajegowda; Wolfgang Ecker (MBMV, 2022)

Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. - Nicolas Gerlin; Endri Kaja; Monideep Bora; Keerthikumara Devarajegowda; Dominik Stoffel; Wolfgang Kunz; Wolfgang Ecker (VLSI-SoC, 2022)

Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. - Endri Kaja; Nicolas Gerlin; Monideep Bora; Gabriel Rutsch; Keerthikumara Devarajegowda; Dominik Stoffel; Wolfgang Kunz; Wolfgang Ecker (VLSI-SoC, 2022)

MetFI: Model-driven Fault Simulation Framework. - Endri Kaja; Nicolas Gerlin; Luis Rivas; Monideep Bora; Keerthikumara Devarajegowda; Wolfgang Ecker (CoRR, 2022)

G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators. - Saranyu Chattopadhyay; Keerthikumara Devarajegowda; Bihan Zhao; Florian Lonsing; Brandon A. D'Agostino; Ioanna Vavelidou; Vijay Deep Bhatt; Sebastian Prebeck; Wolfgang Ecker; Caroline Trippel; Clark W. Barrett; Subhasish Mitra (DAC, 2023)

Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation. - Endri Kaja; Nicolas Gerlin; Robert Kunzelmann; Keerthikumara Devarajegowda; Wolfgang Ecker (MCSoC, 2023)

MCU-Wide Timing Side Channels and Their Detection. - Johannes Müller 006; Anna Lena Duque Antón; Lucas Deutschmann; Dino Mehmedagic; Cristiano Rodrigues; Daniel Oliveira 003; Mohammad Rahmani Fadiheh; Keerthikumara Devarajegowda; Sandro Pinto 001; Dominik Stoffel; Wolfgang Kunz (DAC, 2024)