FLATS, a Machine for Numerical, Symbolic and Associative Computing. - Eiichi Goto; Tetsuo Ida; Kei Hiraki (ISCA, 1979)

Design of a Lisp Machine - FLATS. - Eiichi Goto; Takashi Soma; N. Inada; Tetsuo Ida; Masanori Idesawa; Kei Hiraki; M. Suzuki; Kentaro Shimizu; B. Philipov (Symposium on LISP and Functional Programming, 1982)

An Architecture of a Data Flow Machine and Its Evaluation. - Toshio Shimada; Kei Hiraki; Kenji Nishida (COMPCON, 1984)

Evaluation of Associative Memory Using Parallel Chained Hashing. - Kei Hiraki; Kenji Nishida; Toshio Shimada (IEEE Trans. Computers, 1984)

Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors. - Kei Hiraki; Kenji Nishida; Satoshi Sekiguchi; Toshio Shimada (ICPP, 1986)

Evaluation of a Prototype Data Flow Processor of the SIGMA-1 for Scientific Computations. - Toshio Shimada; Kei Hiraki; Kenji Nishida; Satoshi Sekiguchi (ISCA, 1986)

The SIGMA-1 dataflow computer. - Toshitsugu Yuba; Kei Hiraki; Toshio Shimada; Satoshi Sekiguchi; Kenji Nishida (FJCC, 1987)

Load scheduling schemes using inter - PE network. - Kei Hiraki; Satoshi Sekiguchi; Toshio Shimada (Syst. Comput. Jpn., 1987)

Efficient vector processing on dataflow supercomputer SIGMA-1. - Kei Hiraki; Satoshi Sekiguchi; Toshio Shimada (SC, 1988)

An Architectural Disgn of a Highly Parallel Dataflow Machine. - Yoshinori Yamaguchi; Shuichi Sakai; Kei Hiraki; Yuetsu Kodama (IFIP Congress, 1989)

An Architecture of a Dataflow Single Chip Processor. - Shuichi Sakai; Yoshinori Yamaguchi; Kei Hiraki; Yuetsu Kodama; Toshitsugu Yuba (ISCA, 1989)

Data flow language DFC: Design and implementation. - Toshio Shimada; Satoshi Sekiguchi; Kei Hiraki (Syst. Comput. Jpn., 1989)

Dataflow computer development in Japan. - Toshitsugu Yuba; Toshio Shimada; Yoshinori Yamaguchi; Kei Hiraki; Shuichi Sakai (ICS, 1990)

Sequential description and parallel execution language DFCII dataflow supercomputers. - Satoshi Sekiguchi; Toshio Shimada; Kei Hiraki (ICS, 1991)

Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor. - Kei Hiraki; Toshio Shimada; Satoshi Sekiguchi (International Conference on Supercomputing, 1993)

Dynamic Switching of Coherent Cache Protocols and its Effects on Doacross Loops. - Takashi Matsumoto 002; Kei Hiraki (International Conference on Supercomputing, 1993)

An Architecture for Generalized Synchronization and Fast Switching. - Kattamuri Ekanadham; Steve Gregor; Kei Hiraki; Robert A. Iannucci; Ragunathan Rajkumar (Multithreaded Computer Architecture, 1994)

Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations. - Kei Hiraki; Hideharu Amano; Morihiro Kuga; Toshinori Sueyoshi; Tomohiro Kudoh; Hiroshi Nakashima; Hironori Nakajo; Hideo Matsuda; Takashi Matsumoto 002; Shin-ichiro Mori (ISPAN, 1994)

Automatic Reduction Tree Generation for Fine-Grain Parallel Architectures when Iteration Count is Unknown. - Satoshi Sekiguchi; Kei Hiraki (LCPC, 1994)

Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1. - Tomohiro Kudoh; Hideharu Amano; Takashi Matsumoto 002; Kei Hiraki; Yulu Yang; Katsunobu Nishimura; Koichi Yoshimura; Yasuhito Fukushima (ICPP (1), 1995)

High Performance I/O System of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. - Hironori Nakajo; Takashi Matsumoto 002; Masaki Kohata; Hideo Matsuda; Kei Hiraki; Yukio Kaneda (Parallel and Distributed Computing and Systems, 1995)

Distributed Shared Memory Architecture for JUMP-1: A General-Purpose MPP Prototype. - Takashi Matsumoto 002; Tomohiro Kudoh; Katsunobu Nishimura; Kei Hiraki; Hidehiko Tanaka (ISPAN, 1996)

An I/O Network Architecture of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. - Hironori Nakajo; Satoshi Ohtani; Takashi Matsumoto 002; Masadi Kohata; Kei Hiraki; Yukio Kaneda (International Conference on Supercomputing, 1997)

Resource Management Methods for General Purpose Massively Parallel OS SSS-Core. - Yojiro Nobukuni; Takashi Matsumoto 002; Kei Hiraki (ISHPC, 1997)

Efficient Implementation of Software Release Consistency on Asymmetric Distributed Shared Memory. - Junpei Niwa; Tatsushi Inagaki; Takashi Matsumoto 002; Kei Hiraki (ISPAN, 1997)

Supporting Software Distributed Shared Memory with an Optimizing Compiler. - Tatsushi Inagaki; Junpei Niwa; Takashi Matsumoto 002; Kei Hiraki (ICPP, 1998)

Speculative Execution Model with Duplication. - Kei Hiraki; Junji Tamatsukuri; Takashi Matsumoto 002 (International Conference on Supercomputing, 1998)

MBCF: A Protected and Virtualized High-Speed User-Level Memory-Based Communication Facility. - Takashi Matsumoto 002; Kei Hiraki (International Conference on Supercomputing, 1998)

Implementing MPI with the Memory-Based Communication Facilities on the SSS-CORE Operating System. - Kenji Morimoto; Takashi Matsumoto 002; Kei Hiraki (PVM/MPI, 1998)

Lightweight Hardware Distributed Shared Memory Supported by Generalized Combining. - Kiyofumi Tanaka; Takashi Matsumoto 002; Kei Hiraki (HPCA, 1999)

Performance Evaluation of the MPI/MBCF with the NAS Parallel Benchmarks. - Kenji Morimoto; Takashi Matsumoto 002; Kei Hiraki (PVM/MPI, 1999)

On the Schedulability Conditions on Partial Time Slots . - Shigero Sasaki; Takashi Matsumoto 002; Kei Hiraki (RTCSA, 1999)

Comparative study of page-based and segment-based software DSM through compiler optimization. - Junpei Niwa; Takashi Matsumoto 002; Kei Hiraki (ICS, 2000)

Data Reservoir: A New Approach to Data-Intensive Scientific Computation. - Kei Hiraki; Mary Inaba; Junji Tamatsukuri; Ryutaro Kurusu; Yukichi Ikuta; Hisashi Koga; Akira Zinzaki (ISPAN, 2002)

Highly Fault-Tolerant FPGA Processor by Degrading Strategy. - Yousuke Nakamura; Kei Hiraki (PRDC, 2002)

Data Reservoir: utilization of multi-gigabit backbone network for data-intensive research. - Kei Hiraki; Mary Inaba; Junji Tamatsukuri; Ryutaro Kurusu; Yukichi Ikuta; Hisashi Koga; Akira Zinzaki (SC, 2002)

Compression in Data Caches with Compressible Field Isolation for Recursive Data Structures. - Masamichi Takagi; Kei Hiraki (Euro-Par, 2003)

Selective Optimization of Locks by Runtime Statistics and Just-in-Time Compilation. - Ray Odaira; Kei Hiraki (IPDPS, 2003)

Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structure. - Masamichi Takagi; Kei Hiraki (ISHPC, 2003)

Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems. - Yutaka Sugawara; Mary Inaba; Kei Hiraki (FPL, 2004)

Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches. - Masamichi Takagi; Kei Hiraki (ICS, 2004)

Long Fat Pipe Congestion Control for Multi-Stream Data Transfer. - Makoto Nakamura; Hiroyuki Kamezawa; Junji Tamatsukuri; Mary Inaba; Kei Hiraki; K. Mizuguchi; K. Torii; S. Nakano; Shizuo Yoshita; Ryutaro Kurusu; Masakazu Sakamoto; Yuki Furukawa; et al. (ISPAN, 2004)

Partial Value Number Redundancy Elimination. - Rei Odaira; Kei Hiraki (LCPC, 2004)

Utilizing Dynamic Data Value Localities in Internal Variables. - Shoichi Hirasawa; Kei Hiraki (PDCAT, 2004)

Inter-Layer Coordination for Parallel TCP Streams on Long Fat Pipe Networks. - Hiroyuki Kamezawa; Makoto Nakamura; Junji Tamatsukuri; Nao Aoshima; Mary Inaba; Kei Hiraki (SC, 2004)

A computer architecture education curriculum through the design and implementation of original processors using FPGAs. - Yutaka Sugawara; Kei Hiraki (WCAE, 2004)

Sentinel PRE: Hoisting beyond Exception Dependency with Dynamic Deoptimization. - Rei Odaira; Kei Hiraki (CGO, 2005)

High-speed and Memory Efficient TCP Stream Scanning using FPGA. - Yutaka Sugawara; Mary Inaba; Kei Hiraki (FPL, 2005)

Software SMLP Execution with Side-Effect Slice Exclusion. - Shoichi Hirasawa; Kei Hiraki (PDPTA, 2005)

Applying recent techniques for retro games: in the case of undo function. - Yuu Shibata; Kei Hiraki (Advances in Computer Entertainment Technology, 2006)

Network Processing Hardware. - Mary Inaba; Kei Hiraki (AINTEC, 2006)

Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network. - Yutaka Sugawara; Mary Inaba; Kei Hiraki (FGCN (1), 2007)

GRAPE-DR Project: a combination of peta-scale computing and high-speed networking. - Kei Hiraki (FPT, 2007)

Heterogeneous Functional Units for High Speed Fault-Tolerant Execution Stage. - Yousuke Nakamura; Kei Hiraki (PRDC, 2007)

GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing. - Junichiro Makino; Kei Hiraki; Mary Inaba (SC, 2007)

MCAMP: communication optimization on massively parallel machines with hierarchical scratch-pad memory. - Hiroshige Hayashizaki; Yutaka Sugawara; Mary Inaba; Kei Hiraki (PACT, 2008)

CVC: The C to RTL compiler for callback-based verification model. - Yasuhiro Ito; Yutaka Sugawara; Mary Inaba; Kei Hiraki (FPL, 2008)

Effect of Packet Shuffler on Parallel TCP Stream Network. - Yutaka Sugawara; Takeshi Yoshino; Hiroshi Tezuka; Mary Inaba; Kei Hiraki (ICN, 2008)

Effect of Parallel TCP Stream Equalizer on Real Long Fat-pipe Network. - Yutaka Sugawara; Takeshi Yoshino; Hiroshi Tezuka; Mary Inaba; Kei Hiraki (NCA, 2008)

Performance optimization of TCP/IP over 10 gigabit ethernet by precise instrumentation. - Takeshi Yoshino; Yutaka Sugawara; Katsushi Inagami; Junji Tamatsukuri; Mary Inaba; Kei Hiraki (SC, 2008)

Access map pattern matching for data cache prefetch. - Yasuo Ishii; Mary Inaba; Kei Hiraki (ICS, 2009)

Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go. - Kenichi Koizumi; Mary Inaba; Kei Hiraki; Yasuo Ishii; Takefumi Miyoshi; Kazuki Yoshizoe (ReConFig, 2009)

Hardware Accelerator for Full-Text Search (HAFTS) with Succinct Data Structure. - Naoki Tanida; Mary Inaba; Kei Hiraki; Takeshi Yoshino (ReConFig, 2009)

Compressing Floating-Point Number Stream for Numerical Applications. - Hisanobu Tomari; Mary Inaba; Kei Hiraki (ICNC, 2010)

Simulating the Universe on an Intercontinental Grid. - Simon Portegies Zwart; Derek Groen; Tomoaki Ishiyama; Keigo Nitadori; Junichiro Makino; Cees de Laat; Steve McMillan; Kei Hiraki; Stefan Harfst; Paola Grosso (Computer, 2010)

Simulating the universe on an intercontinental grid of supercomputers - Simon Portegies Zwart; Tomoaki Ishiyama; Derek Groen; Keigo Nitadori; Junichiro Makino; Cees de Laat; Stephen L. W. McMillan; Kei Hiraki; Stefan Harfst; Paola Grosso (CoRR, 2010)

CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection. - Hidetsugu Irie; Takefumi Miyoshi; Goki Honjo; Kei Hiraki; Tsutomu Yoshinaga (ICNC, 2011)

Access Map Pattern Matching for High Performance Data Cache Prefetch. - Yasuo Ishii; Mary Inaba; Kei Hiraki (J. Instr. Level Parallelism, 2011)

The performance of GRAPE-DR for dense matrix operations. - Junichiro Makino; Hiroshi Daisaka; Toshiyuki Fukushige; Yutaka Sugawara; Mary Inaba; Kei Hiraki (ICCS, 2011)

SIGMA-1. - Kei Hiraki (Encyclopedia of Parallel Computing, 2011)

Unified memory optimizing architecture: memory subsystem control with a unified predictor. - Yasuo Ishii; Mary Inaba; Kei Hiraki (ICS, 2012)

Abstract: Impact of Integer Instructions in Floating Point Applications. - Hisanobu Tomari; Kei Hiraki (SC Companion, 2012)

Poster: The Impact of Integer Instructions in Floating Point Applications. - Hisanobu Tomari; Kei Hiraki (SC Companion, 2012)

Using Cacheline Reuse Characteristics for Prefetcher Throttling. - Hidetsugu Irie; Takefumi Miyoshi; Goki Honjo; Kei Hiraki; Tsutomu Yoshinaga (IEICE Trans. Inf. Syst., 2012)

Accelerating cache coherence mechanism with speculation. - Jun Ohno; Kei Hiraki (ICS, 2014)

FOLCS: A Lightweight Implementation of a Cycle-accurate NoC Simulator on FPGAs. - Takahiro Naruko; Kei Hiraki (MES@ISCA, 2014)

An Optimization of Resource Arrangement for Network-on-Chip using Genetic Algorithm. - Daichi Murakami; Kei Hiraki (PACT, 2015)

Efficient implementation of continuous skyline computation on a multi-core processor. - Kenichi Koizumi; Mary Inaba; Kei Hiraki (MEMOCODE, 2015)

Keeping old computers alive for deeper understanding of computer architecture. - Hisanobu Tomari; Kei Hiraki (WCAE, 2015)

BJR-Tree: Fast Skyline Computation Algorithm for Serendipitous Searching Problems. - Kenichi Koizumi; Peter Eades; Kei Hiraki; Mary Inaba (DSAA, 2017)

Skyline Computation for Low-Latency Image-Activated Cell Identification. - Kenichi Koizumi; Kei Hiraki; Mary Inaba (AAAI, 2018)

Continuous Skyline Computation Accelerator with Parallelizing Dominance Relation Calculations: (Abstract Only). - Kenichi Koizumi; Kei Hiraki; Mary Inaba (FPGA, 2018)

BJR-tree: fast skyline computation algorithm using dominance relation-based tree structure. - Kenichi Koizumi; Peter Eades; Kei Hiraki; Mary Inaba (Int. J. Data Sci. Anal., 2019)