A 600-MHz single-chip multiprocessor with 4.8-GB/s internal shared pipelined bus and 512-kB internal memory. - Satoshi Kaneko; Hiroyuki Kondo; Norio Masui; Koichi Ishimi; Teruyuki Itou; Masayuki Satou; Naoto Okumura; Yukari Takata; Hirokazu Takata; Mamoru Sakugawa; Takashi Higuchi; Sugako Ohtani; et al. (IEEE J. Solid State Circuits, 2004)

The Problem Analysis of Specific Personal Information Protection Assessment in Japan Case. - Sanggyu Shin; Yoichi Seto; Mayumi Sasaki; Kei Sakamoto (CSA/CUTE, 2016)

Analysis of Specific Personal Information Protection Assessment in the Social Security and Tax Number System of Local Governments in Japan. - Sanggyu Shin; Yoichi Seto; Mayumi Sasaki; Kei Sakamoto (CISIM, 2017)

Consideration of Privacy Risk Assessment of the My Number in the Financial Industry in Japan. - Sanggyu Shin; Yoichi Seto; Kei Sakamoto; Mayumi Sasaki (CSA/CUTE, 2017)

Deep-learning-based identification of odontogenic keratocysts in hematoxylin- and eosin-stained jaw cyst specimens. - Kei Sakamoto; Kei-ichi Morita; Tohru Ikeda; Kou Kayamori (CoRR, 2019)

One-Pulse-Programmable Multi-Level PCM/Selector Cross-Point Memory for 20 nm Half Pitch and Beyond. - Yuya Matsuzawa; Yuki Ohnishi; Kazuhiro Katono; Yusuke Muto; Takayuki Tsukagoshi; Hiroki Tokuhira; Kei Sakamoto; Hisakazu Matsumori; Hiroyuki Ode; Shosuke Fujii; Hide Tanaka; Takeshi Fujimaki (ESSDERC, 2023)