Fabrication of High Quality InAs-on-Lnsulator Structures by Smart Cut Process with Reuse of InAs Wafers. - Kei Sumita; Jun Takeyasu; Kimihiko Kato; Kasidit Toprasertpong; Mitsuru Takenaka; Shinichi Takagi (3DIC, 2019)

Advanced MOS Device Technology for Low Power Logic LSI. - Shinichi Takagi; Kimihiko Kato; Kei Sumita; Kwangwon Jo; Cheol-Min Lim; Ryotaro Takaguchi; Dae-Hwan Ahn; Jun Takeyasu; Kasidit Toprasertpong; Mitsuru Takenaka (MIXDES, 2019)

III-V/Si hybrid integration for scalable optical switching and computing. - Mitsuru Takenaka; Hanzhi Tang; Kouhei Watanabe; Takaya Ochiai; Tomohiro Akazawa; Yuto Miyatake; Shuhei Ohno; Kei Sumita; Stéphane Monfray; Frédéric Boeuf; Rui Tang; Kasidit Toprasertpong; et al. (OECC/PSC, 2022)