A Provable Near-Optimal Algorithm for the Channel Pin Assignment Problem. - Jason Cong; Kei-Yong Khoo (ICCD, 1991)

A fast multilayer general area router for MCM designs. - Kei-Yong Khoo; Jason Cong (EURO-DAC, 1992)

An efficient 175 MHz programmable FIR digital filter. - Kei-Yong Khoo; Alan Y. Kwentus; Alan N. Willson Jr. (ISCAS, 1993)

Low Power CMOS Clock Buffer. - Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS, 1994)

Single-transistor transparent-latch clocking. - Kei-Yong Khoo; Alan N. Willson Jr. (ARVLSI, 1995)

An Improved Polynomial-Time Algorithm for Designing Digital Filters with Power-of-Two Coefficients. - Chao-Liang Chen; Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS, 1995)

Charge recovery on a databus. - Kei-Yong Khoo; Alan N. Willson Jr. (ISLPD, 1995)

An efficient multilayer MCM router based on four-via routing. - Kei-Yong Khoo; Jason Cong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Cycle-Based Timing Simulations Using Event-Stream. - Kei-Yong Khoo; Alan N. Willson Jr. (ICCD, 1996)

A programmable FIR digital filter using CSD coefficients. - Kei-Yong Khoo; Alan Y. Kwentus; Alan N. Willson Jr. (IEEE J. Solid State Circuits, 1996)

Interconnect design for deep submicron ICs. - Jason Cong; David Zhigang Pan; Lei He 001; Cheng-Kok Koh; Kei-Yong Khoo (ICCAD, 1997)

An implicit connection graph maze routing algorithm for ECO routing. - Jason Cong; Jie Fang; Kei-Yong Khoo (ICCAD, 1999)

Bit-level arithmetic optimization for carry-save additions. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ICCAD, 1999)

A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. - Kei-Yong Khoo; Chao-Liang Chen; Alan N. Willson Jr. (ISCAS (1), 1999)

Improved-Booth encoding for low-power multipliers. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ISCAS (1), 1999)

VIA design rule consideration in multi-layer maze routing algorithms. - Jason Cong; Jie Fang; Kei-Yong Khoo (ISPD, 1999)

The use of carry-save representation in joint module selection and retiming. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (DAC, 2000)

Efficient implementation of FIR filters using bit-level optimized carry-save additions. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (EUSIPCO, 2000)

Joint module selection and retiming with carry-save representation. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (EUSIPCO, 2000)

DUNE: a multi-layer gridless routing system with wire planning. - Jason Cong; Jie Fang; Kei-Yong Khoo (ISPD, 2000)

Via design rule consideration in multilayer maze routing algorithms. - Jason Cong; Jie Fang; Kei-Yong Khoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Design of optimal hybrid form FIR filter. - Kei-Yong Khoo; Zhan Yu; Alan N. Willson Jr. (ISCAS (2), 2001)

DUNE-a multilayer gridless routing system. - Jason Cong; Jie Fang; Kei-Yong Khoo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Optimal joint module-selection and retiming with carry-save representation. - Zhan Yu; Kei-Yong Khoo; Alan N. Willson Jr. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Efficient VLSI implementation of N/N integer division. - Kei-Yong Khoo; Alan N. Willson Jr. (ISCAS (1), 2005)

Formal Verifications in Modern Chip Designs. - Kei-Yong Khoo (HLDVT, 2006)

Improving Constant-Coefficient Multiplier Verification by Partial Product Identification. - Chao-Yue Lai; Chung-Yang Huang; Kei-Yong Khoo (DATE, 2008)

ICCAD-2012 CAD contest in finding the minimal logic difference for functional ECO and benchmark suite: CAD contest. - WoeiTzy Jong; Hwei-Tseng Wang; Chengta Hsieh; Kei-Yong Khoo (ICCAD, 2012)

ICCAD-2013 CAD contest in technology mapping for macro blocks and benchmark suite. - Chih-Jen Hsu; Wei-Hsun Lin; Hwei-Tseng Wang; Feng Lu; Kei-Yong Khoo (ICCAD, 2013)

ICCAD-2014 CAD contest in simultaneous CNF encoder optimization with SAT solver setting selection and benchmark suite. - Chih-Jen Hsu; Wei-Hsun Lin; Chi-An Wu; Kei-Yong Khoo (ICCAD, 2014)

Sequential equivalence checking of clock-gated circuits. - Yu-Yun Dai; Kei-Yong Khoo; Robert K. Brayton (DAC, 2015)

ICCAD-2015 CAD Contest in Large-scale Equivalence Checking and Function Correction and Benchmark Suite. - Chih-Jen Hsu; Chi-An Wu; Wei-Hsun Lin; Kei-Yong Khoo (ICCAD, 2015)

ICCAD-2016 CAD contest in non-exact projective NPNP boolean matching and benchmark suite. - Chi-An (Rocky) Wu; Chih-Jen (Jacky) Hsu; Kei-Yong Khoo (ICCAD, 2016)

ICCAD-2017 CAD contest in resource-aware patch generation. - Ching-Yi Huang; Chih-Jen Hsu; Chi-An Wu; Kei-Yong Khoo (ICCAD, 2017)

2019 CAD Contest: Logic Regression on High Dimensional Boolean Space. - Ching-Yi Huang; Chi-An (Rocky) Wu; Tung-Yuan Lee; Chih-Jen (Jacky) Hsu; Kei-Yong Khoo (ICCAD, 2019)

ICCAD-2020 CAD Contest in X-value Equivalence Checking and Benchmark Suite : Invited Talk. - Chih-Jen Hsu; Chi-An Wu; Ching-Yi Huang; Kei-Yong Khoo (ICCAD, 2020)

2021 CAD Contest Problem A: Functional ECO with Behavioral Change Guidance Invited Paper. - Yen-Chun Fang; Shao-Lun Huang; Chi-An Wu; Chung-Han Chou; Chih-Jen Hsu; WoeiTzy Jong; Kei-Yong Khoo (ICCAD, 2021)

Invited Paper: 2023 ICCAD CAD Contest Problem A: Multi-Bit Large-Scale Boolean Matching. - Chung-Han Chou; Chih-Jen (Jacky) Hsu; Chi-An (Rocky) Wu; Kuan-Hua Tu; Kei-Yong Khoo (ICCAD, 2023)