A CMOS Image Sensor Integrating Column-Parallel Cyclic ADCs with On-Chip Digital Error Correction Circuits. - Shoji Kawahito; Jong-Ho Park; Keigo Isobe; Suhaidi Shafie; T. Lida; Takashi Mizota (ISSCC, 2008)

A 0.1e- vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs. - Jong-Ho Park; Satoshi Aoyama; Takashi Watanabe 003; Tomoyuki Akahori; Tomohiko Kosugi; Keigo Isobe; Yuichi Kaneko; Zheng Liu; Kazuki Muramatsu; Takeshi Matsuyama; Takeshi Kawahito (ISSCC, 2009)

An 80μVrms-temporal-noise 82dB-dynamic-range CMOS Image Sensor with a 13-to-19b variable-resolution column-parallel folding-integration/cyclic ADC. - Min-Woong Seo; Sungho Suh; Tetsuya Iida; Hiroshi Watanabe; Taishi Takasawa; Tomoyuki Akahori; Keigo Isobe; Takashi Watanabe 003; Shinya Itoh; Shoji Kawahito (ISSCC, 2011)

A 33Mpixel 120fps CMOS image sensor using 12b column-parallel pipelined cyclic ADCs. - Toshihisa Watabe; Kazuya Kitamura; Takehide Sawamoto; Tomohiko Kosugi; Tomoyuki Akahori; Tetsuya Iida; Keigo Isobe; Takashi Watanabe 003; Hiroshi Shimamoto; Hiroshi Ohtake; Satoshi Aoyama; Shoji Kawahito; et al. (ISSCC, 2012)

A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC. - Min-Woong Seo; Sungho Suh; Tetsuya Iida; Taishi Takasawa; Keigo Isobe; Takashi Watanabe 003; Shinya Itoh; Keita Yasutomi; Shoji Kawahito (IEEE J. Solid State Circuits, 2012)

Design, implementation and evaluation of a TOF range image sensor using multi-tap lock-in pixels with cascaded charge draining and modulating gates. - Hanh Trang; Taichi Kasugai; Keigo Isobe; Sang-Man Han; Taichi Takasawa; Xing Lioe De; Keita Yasutomi; Keiichiro Kagawa; Shoji Kawahito (IMSE, 2016)