A back-illuminated global-shutter CMOS image sensor with pixel-parallel 14b subthreshold ADC. - Masaki Sakakibara; Koji Ogawa; Shin Sakai; Yasuhisa Tochigi; Katsumi Honda; Hidekazu Kikuchi; Takuya Wada; Yasunobu Kamikubo; Tsukasa Miura; Masahiko Nakamizo; Naoki Jyo; Ryo Hayashibara; et al. (ISSCC, 2018)

A 6.9-µm Pixel-Pitch Back-Illuminated Global Shutter CMOS Image Sensor With Pixel-Parallel 14-Bit Subthreshold ADC. - Masaki Sakakibara; Koji Ogawa; Shin Sakai; Yasuhisa Tochigi; Katsumi Honda; Hidekazu Kikuchi; Takuya Wada; Yasunobu Kamikubo; Tsukasa Miura; Masahiko Nakamizo; Naoki Jyo; Ryo Hayashibara; et al. (IEEE J. Solid State Circuits, 2018)

A Stacked CMOS Image Sensor With Array-Parallel ADC Architecture. - Tomohiro Takahashi; Yuichi Kaji; Yasunori Tsukuda; Shinichiro Futami; Katsuhiko Hanzawa; Takahito Yamauchi; Ping Wah Wong; Frederick T. Brady; Phil Holden; Thomas Ayers; Kyohei Mizuta; Susumu Ohki; et al. (IEEE J. Solid State Circuits, 2018)

A 6.9 μm Pixel-Pitch 3D Stacked Global Shutter CMOS Image Sensor with 3M Cu-Cu connections. - Tsukasa Miura; Masaki Sakakibara; Hirotsugu Takahashi; Tadayuki Taura; Keiji Tatani; Yusuke Oike; Takayuki Ezaki (3DIC, 2019)

A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide-Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency. - Koichiro Zaitsu; Akira Matsumoto; Mizuki Nishida; Yusuke Tanaka; Hirofumi Yamashita; Yosuke Satake; Takashi Watanabe; Kunihiko Araki; Naoki Nei; Keiichi Nakazawa; Junpei Yamamoto; Mutsuo Uehara; et al. (VLSI Technology and Circuits, 2022)