A comprehensive CAD system for high-performance 300 K-circuit ASIC logic chips. - Jeannie H. Panner; Richard P. Abato; Robert W. Bassett; Keith M. Carrig; Pamela S. Gillis; David J. Hathaway; Terrence W. Sehr (IEEE J. Solid State Circuits, 1991)

A pseudo-hierarchical methodology for high performance microprocessor design. - A. Bertolet; K. Carpenter; Keith M. Carrig; Albert M. Chu; A. Dean; Frank D. Ferraiolo; Stephan Kenyon; D. Phan; John G. Petrovick; G. Rodgers; D. Willmott; T. Bairley; et al. (ISPD, 1997)

A Clock Methodology for High-Performance Microprocessors. - Keith M. Carrig; Albert M. Chu; Frank D. Ferraiolo; John G. Petrovick; P. Andrew Scott; Richard J. Weiss (J. VLSI Signal Process., 1997)

A new direction in ASIC high-performance clock methodology. - Keith M. Carrig; Niel T. Gargiulo; Roger P. Gregor; Daniel R. Menard; Harold E. Reindel (CICC, 1998)