A methodology for formal design of hardware control with application to cache coherence protocols. - Cindy Eisner; Irit Shitsevalov; Russ Hoover; Wayne G. Nation; Kyle L. Nelson; Ken Valk (DAC, 2000)

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors. - Nicolas Dupuis; Ravi Nair; Shyam Ramji; Sean McClintock; Nishant Chauhan; Priyanka Nagpal; Bart Blaner; Ken Valk; Leon Stok; Ruchir Puri (CoRR, 2025)