A high-speed dynamic instruction scheduling scheme for superscalar processors. - Masahiro Goshima; Kengo Nishino; Toshiaki Kitamura; Yasuhiko Nakashima; Shinji Tomita; Shin-ichiro Mori (MICRO, 2001)

Generation of Navigation Script from Log and Link. - Kengo Nishino; Daisuke Nagano; Sachio Hirokawa (WebNet, 2001)

New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications. - Taro Fujii; Takao Toi; Teruhito Tanaka; Katsumi Togawa; Toshiro Kitaoka; Kengo Nishino; Noritsugu Nakamura; Hiroki Nakahara; Masato Motomura (VLSI Circuits, 2018)