Leakage power reduction for clock gating scheme on PD-SOI. - Kazuki Fukuoka; Masaaki Iijima; Kenji Hamada; Masahiro Numa; Akira Tada (ISCAS (2), 2004)

A Novel Layout Approach Using Dual Supply Voltage Technique on Body-Tied PD-SOI. - Kazuki Fukuoka; Masaaki Iijima; Kenji Hamada; Masahiro Numa; Akira Tada (PATMOS, 2004)

High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI. - Masayuki Kitamura; Masaaki Iijima; Kenji Hamada; Masahiro Numa; Hiromi Notani; Akira Tada; Shigeto Maegawa (PATMOS, 2006)

Dynamic threshold voltage control for dual supply voltage scheme on PD-SOI. - Masaaki Iijima; Kenji Hamada; Masayuki Kitamura; Masahiro Numa; Akira Tada; Takashi Ipposhi (IEICE Electron. Express, 2006)