Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors. - Kiyoshi Ishii; Hideyuki Nosaka; Hiroki Nakajima; Kenji Kurishima; Minoru Ida; Noriyuki Watanabe; Yasurou Yamane; Eiichi Sano; Takatomo Enoki (IEEE J. Solid State Circuits, 2002)

High-bit-rate low-power decision circuit using InP/InGaAs HBT technology [master-slave D-type flip-flop]. - Kiyoshi Ishii; Hideyuki Nosaka; Minoru Ida; Kenji Kurishima; Michihiro Hirata; Takatorno Enoki; Tsugumichi Shibata (ESSCIRC, 2004)

A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector. - Hideyuki Nosaka; Eiichi Sano; Kiyoshi Ishii; Minoru Ida; Kenji Kurishima; Shoji Yamahata; Tsugumichi Shibata; Hiroyuki Fukuyama; Mikio Yoneyama; Takatomo Enoki; Masahiro Muraguchi (IEEE J. Solid State Circuits, 2004)

A 24-Gsps 3-Bit Nyquist ADC Using InP HBTs for DSP-Based Electronic Dispersion Compensation. - Hideyuki Nosaka; Makoto Nakamura; Kimikazu Sano; Minoru Ida; Kenji Kurishima; Tsugumichi Shibata; Masami Tokumitsu; Masahiro Muraguchi (IEICE Trans. Electron., 2005)

High-bit-rate low-power decision circuit using InP-InGaAs HBT technology. - Kiyoshi Ishii; Hideyuki Nosaka; Kimikazu Sano; Koichi Murata; Minoru Ida; Kenji Kurishima; Michihiro Hirata; Tsugumichi Shibata; Takatomo Enoki (IEEE J. Solid State Circuits, 2005)

Highly Reliable Submicron InP-Based HBTs with over 300-GHz ft. - Norihide Kashio; Kenji Kurishima; Yoshino K. Fukai; Shoji Yamahata (IEICE Trans. Electron., 2008)

Emitter-metal-related degradation in InP-based HBTs operating at high current density and its suppression by refractory metal. - Yoshino K. Fukai; Kenji Kurishima; Norihide Kashio; Minoru Ida; Shoji Yamahata; Takatomo Enoki (Microelectron. Reliab., 2009)

A low-power wideband InP-HBT 27-1 PRBS generator. - Yves Bouvier; Kimikazu Sano; Munehiko Nagatani; Koichi Murata; Kenji Kurishima; Minoru Ida (IEICE Electron. Express, 2012)

Performance of InP/InGaAs HBTs with a Thin Highly N-Type Doped Layer in the Emitter-Base Heterojunction Vicinity. - Kenji Kurishima; Minoru Ida; Norihide Kashio; Yoshino K. Fukai (IEICE Trans. Electron., 2012)

An InP-Based 27-GHz-Bandwidth Limiting TIA IC Designed to Suppress Undershoot and Ringing in Its Output Waveform. - Hiroyuki Fukuyama; Michihiro Hirata; Kenji Kurishima; Minoru Ida; Masami Tokumitsu; Shogo Yamanaka; Munehiko Nagatani; Toshihiro Itoh; Kimikazu Sano; Hideyuki Nosaka; Koichi Murata (IEICE Trans. Electron., 2016)

Type-II InGaAsSb-Base Double Heterojunction Bipolar Transistors Simultaneously Exhibiting over 600-GHz fmax and 5-V Breakdown Voltage. - Norihide Kashio; Takuya Hoshi; Kenji Kurishima; Minoru Ida; Hideaki Matsuzaki (IEICE Trans. Electron., 2016)

InGaP/GaAsSb/InGaAsSb double heterojunction bipolar transistors with 703-GHz fmax and 5.4-V breakdown voltage. - Takuya Hoshi; Norihide Kashio; Yuta Shiratori; Kenji Kurishima; Minoru Ida; Hideaki Matsuzaki (IEICE Electron. Express, 2019)