Three dimensional IC's and an application to high speed image processor. - Kenji Taniguchi 001 (IEEE Symposium on Computer Arithmetic, 1985)

Process modeling and simulation: boundary conditions for point defect-based impurity diffusion model. - Kenji Taniguchi 001; Yoshiaki Shibata; Chihiro Hamaguchi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

A ratio-independent algorithmic pipeline analog-to-digital converter. - Shingo Hatanaka; Kenji Taniguchi 001 (ICECS, 2001)

A novel dynamically programmable arithmetic array using code division multiple access bus. - Boon-Keat Tan; Ryuji Yoshimura; Toshimasa Matsuoka; Kenji Taniguchi 001 (ICECS, 2001)

A 3.4-mW 128-MHz analog correlator for DS-CDMA wireless applications. - Mostafa A. R. Eltokhy; Boon-Keat Tan; Toshimasa Matsuoka; Kenji Taniguchi 001 (ISCAS (5), 2002)

A 50% duty-cycle correction circuit for PLL output. - T. Gawa; Kenji Taniguchi 001 (ISCAS (4), 2002)

CMOS phase-shift VCO for short-range wireless communication. - M. Nakamura; Toshimasa Matsuoka; Kenji Taniguchi 001 (ISCAS (4), 2002)

A study of robustness and coupling-noise immunity on simultaneous data transfer CDMA bus interface. - Masaru Takahashi; Boon-Keat Tan; Hiroshi Iwamura; Toshimasa Matsuoka; Kenji Taniguchi 001 (ISCAS (4), 2002)

Multiple-bit parallel-CDMA technique for an on-chip interface featuring high data transmission rate, small latency and high noise tolerance. - Shinsaku Shimizu; Toshimasa Matsuoka; Kenji Taniguchi 001 (ESSCIRC, 2003)

Parallel bus systems using code-division multiple access technique. - Shinsaku Shimizu; Toshimasa Matsuoka; Kenji Taniguchi 001 (ISCAS (2), 2003)

A New Analog Correlator Circuit for DS-CDMA Wireless Applications. - Mostafa A. R. Eltokhy; Boon-Keat Tan; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

CMOS voltage reference based on gate work function differences in poly-Si controlled by conductivity type and impurity concentration. - Hirobumi Watanabe; Shunsuke Ando; Hideyuki Aota; Masanori Dainin; Yong-Jin Chun; Kenji Taniguchi 001 (IEEE J. Solid State Circuits, 2003)

A dual-band image-reject mixer for GPS with 64dB image rejection. - Yoshihiro Utsurogi; Masaki Haruoka; Toshimasa Matsuoka; Kenji Taniguchi 001 (ASP-DAC, 2004)

Atomic configuration of boron pile-up at the Si/SiO2 interface. - Masayuki Furuhashi; Tetsuya Hirose; Hiroshi Tsuji; Masayuki Tachi; Kenji Taniguchi 001 (IEICE Electron. Express, 2004)

Drain current response delay of FD-SOI MOSFETs in RF operation. - Yoshiyuki Shimizu; Gue Chol Kim; Bunsei Murakami; Keisuke Ueda; Yoshihiro Utsurogi; Sungwoo Cha; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2004)

A widely tunable Gm-C filter using tail current offset in two differential pairs. - Tomoyuki Tanaka; Sungwoo Cha; Shinsaku Shimizu; Tsukasa Ida; Hiroaki Ishihara; Toshimasa Matsuoka; Kenji Taniguchi 001; Akashi Sugimori; Hiroki Hihara (ISCAS (1), 2005)

A 1-V 120-MHz FD-SOI CMOS linear-in-dB variable gain amplifier. - Sungwoo Cha; Yoshiyuki Shimizu; Gue Chol Kim; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2005)

Experimental study of integrated tunable transformer. - Hideki Shima 002; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2005)

A CMOS IF Variable Gain Amplifier with Exponential Gain Control. - Sungwoo Cha; Tetsuya Hirose; Masaki Haruoka; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Ultralow-Power Current Reference Circuit with Low Temperature Dependence. - Tetsuya Hirose; Toshimasa Matsuoka; Kenji Taniguchi 001; Tetsuya Asai; Yoshihito Amemiya (IEICE Trans. Electron., 2005)

Wired CDMA Interface with Adaptivity for Interconnect Capacitances. - Tsukasa Ida; Shinsaku Shimizu; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A New Inductance Extraction Technique of On-Wafer Spiral Inductor Based on Analytical Interconnect Formula. - Hideki Shima 002; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2005)

CMOS Front-End Circuits of Dual-Band GPS Receiver. - Yoshihiro Utsurogi; Masaki Haruoka; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2005)

Frequency Response Analysis of Latch Utilized in High-Speed Comparator. - Shunsuke Okura; Tetsuro Okura; Kenji Taniguchi 001; Hajime Shibata (ICECS, 2006)

Analytical GMD formulas for mutual inductance calculation of multilevel interconnects. - Hideki Shima 002; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2006)

Accurate Small-Signal Modeling of FD-SOI MOSFETs. - Gue Chol Kim; Yoshiyuki Shimizu; Bunsei Murakami; Masaru Goto; Keisuke Ueda; Takao Kihara; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2006)

Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. - Takao Kihara; Gue Chol Kim; Masaru Goto; Keiji Nakamura; Yoshiyuki Shimizu; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC. - Shunsuke Okura; Tetsuro Okura; Indika U. K. Bogoda Appuhamylage; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Sub-threshold signal detection using noise statistics for communications applications. - Hyunju Ham; Toshimasa Matsuoka; Kenji Taniguchi 001 (ICECS, 2008)

A novel approach to implement summing function for feedforward Δ-Σ AD modulator. - Jun Wang 009; Toru Ido; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2008)

A novel third order Delta Sigma Modulator with one opamp shared among three integrator stages. - Daisuke Kanemoto; Toru Ido; Kenji Taniguchi 001 (IEICE Electron. Express, 2008)

Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources. - Jun Wang 009; Tuck-Yang Lee; Dong-Gyou Kim; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2008)

A 0.5 V feedforward delta-sigma modulator with inverter-based integrator. - Jun Wang 009; Toshimasa Matsuoka; Kenji Taniguchi 001 (ESSCIRC, 2009)

Analytical design of a 0.5V 5GHz CMOS LC-VCO. - Fumiaki Yamashita; Toshimasa Matsuoka; Takao Kihara; Isao Takobe; Hae-Ju Park; Kenji Taniguchi 001 (IEICE Electron. Express, 2009)

Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems. - Hyunju Ham; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. - Takao Kihara; Hae-Ju Park; Isao Takobe; Fumiaki Yamashita; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2009)

A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter. - Shunsuke Okura; Tetsuro Okura; Toru Ido; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Design of a low-voltage CMOS mixer based on variable load technique. - Bao-Lin Wei; Yu-jie Dai; Jun Wang 009; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2010)

A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. - Takao Kihara; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2010)

Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. - Toshimasa Matsuoka; Jun Wang 009; Takao Kihara; Hyunju Ham; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique. - Indika U. K. Bogoda Appuhamylage; Shunsuke Okura; Toru Ido; Kenji Taniguchi 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A Frequency Model of a Continuously Driven Clocked CMOS Comparator. - Shunsuke Okura; Hajime Shibata; Tetsuro Okura; Toru Ido; Kenji Taniguchi 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Rf front-end design for CMOS terrestrial wideband TV tuner IC. - Takatsugu Kamata; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEEE Trans. Consumer Electron., 2010)

A 7.5mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique. - Daisuke Kanemoto; Toru Ido; Kenji Taniguchi 001 (ISOCC, 2011)

A Novel 100ppm/°C current reference for ultra-low-power subthreshold applications. - Indika U. K. Bogoda Appuhamylage; Daisuke Kanemoto; Kenji Taniguchi 001 (IEICE Electron. Express, 2011)

Design of a 500-MS/s stochastic signal detection circuit using a non-linearity reduction technique in a 65-nm CMOS process. - Hyunju Ham; Toshimasa Matsuoka; Jun Wang 009; Kenji Taniguchi 001 (IEICE Electron. Express, 2011)

An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference. - Indika U. K. Bogoda Appuhamylage; Shunsuke Okura; Toru Ido; Kenji Taniguchi 001 (IEICE Trans. Electron., 2011)

A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation. - Hisayasu Sato; Takaya Maruyama; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2011)

A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching. - Yu Tamura; Toru Ido; Kenji Taniguchi 001 (IEICE Trans. Electron., 2011)

A Multi-Stage Second Order Dynamic Element Matching with In-Band Mismatch Noise Reduction Enhancement. - Yu Tamura; Toru Ido; Kenji Taniguchi 001 (IEICE Trans. Electron., 2011)

Low-power zero-IF full-segment ISDB-T CMOS tuner with tenth-order baseband filters. - Takatsugu Kamata; Kazunori Okui; Masahiko Fukasawa; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEEE Trans. Consumer Electron., 2011)

A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators. - Daisuke Kanemoto; Yu Tamura; Indika U. K. Bogoda Appuhamylage; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2012)

Wireless on-chip microparticle manipulation using pulse-driven dielectrophoresis. - Shun Ueda; Yusuke Miyawaki; Jun Wang 009; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2012)

A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators. - Daisuke Kanemoto; Toru Ido; Kenji Taniguchi 001 (IEICE Trans. Electron., 2012)

A low-power technique for pipelined ADCs with programmable gain amplification. - Tetsuro Okura; Shunsuke Okura; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Electron. Express, 2013)