CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology. - Rhonda Kay Gaede; Don E. Ross; M. Ray Mercer; Kenneth M. Butler (DAC, 1988)

The Influences of Fault Type and Topology on Fault Model Performance and the Implications to Test and Testable Design. - Kenneth M. Butler; M. Ray Mercer (DAC, 1990)

Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams. - Kenneth M. Butler; Don E. Ross; Rohit Kapur; M. Ray Mercer (DAC, 1991)

Fast functional evaluation of candidate OBDD variable orderings. - Don E. Ross; Kenneth M. Butler; Rohit Kapur; M. Ray Mercer (EURO-DAC, 1991)

Exact ordered binary decision diagram size when representing classes of symmetric functions. - Don E. Ross; Kenneth M. Butler; M. Ray Mercer (J. Electron. Test., 1991)

The roles of controllability and observability in design for test. - Kenneth M. Butler; Rohit Kapur; M. Ray Mercer; Don E. Ross (VTS, 1992)

Correlating defect level to final test fault coverage for modular structured designs [microcontroller family]. - Theo J. Powell; Kenneth M. Butler; Mike Ales; Roy Haley; Mark Perry (VTS, 1994)

Deep Submicron: Is Test Up to the Challenge? - Kenneth M. Butler (ITC, 1995)

Test Generation and Design for Test for a Large Multiprocessing DSP. - Graham Hetherington; Greg Sutton; Kenneth M. Butler; Theo J. Powell (ITC, 1995)

Integrating Automated Diagnosis into the Testing and Failure Analysis Operations. - Kenneth M. Butler; Karl Johnson; Jeff Platt; Anjali Jones; Jayashree Saxena (ITC, 1996)

Bridging Fault Diagnosis in the Absence of Physical Information. - David B. Lavo; Tracy Larrabee; F. Joel Ferguson; Brian Chess; Jayashree Saxena; Kenneth M. Butler (ITC, 1997)

So What Is an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment. - Phil Nigh; Wayne M. Needham; Kenneth M. Butler; Peter C. Maxwell; Robert C. Aitken; Wojciech Maly (ITC, 1997)

An experimental study comparing the relative effectiveness of functional, scan, IDDq and delay-fault testing. - Phil Nigh; Wayne M. Needham; Kenneth M. Butler; Peter C. Maxwell; Robert C. Aitken (VTS, 1997)

Automated Diagnosis in Testing and Failure Analysis. - Kenneth M. Butler; Karl Johnson; Jeff Platt; Anjali Kinra; Jayashree Saxena (IEEE Des. Test Comput., 1997)

The stuck-at fault: it ain't over 'til it's over. - Kenneth M. Butler (ITC, 1998)

On applying non-classical defect models to automated diagnosis. - Jayashree Saxena; Kenneth M. Butler; Hari Balachandran; David B. Lavo; Tracy Larrabee; F. Joel Ferguson; Brian Chess (ITC, 1998)

Expediting ramp-to-volume production. - Hari Balachandran; Jason Parker; Gordon Gammie; John W. Olson; Craig Force; Kenneth M. Butler; Sri Jandhyala (ITC, 1999)

Correlation of logical failures to a suspect process step. - Hari Balachandran; Jason Parker; Daniel Shupp; Stephanie Butler; Kenneth M. Butler; Craig Force; Jason Smith (ITC, 1999)

A study of test quality/tester scan memory trade-offs using the SEMATECH test methods data. - Kenneth M. Butler (ITC, 1999)

REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experimen. - Michael R. Grimaila; Sooryong Lee; Jennifer Dworak; Kenneth M. Butler; Bret Stewart; Hari Balachandran; Bryan Houchins; Vineet Mathur; Jaehong Park; Li-C. Wang; M. Ray Mercer (VTS, 1999)

Estimating the Economic Benefits of DFT. - Kenneth M. Butler (IEEE Des. Test Comput., 1999)

An empirical study on the effects of test type ordering on overall test efficiency. - Jayashree Saxena; Kenneth M. Butler (ITC, 2000)

Computer-aided fault to defect mapping (CAFDM) for defect diagnosis. - Zoran Stanojevic; Hari Balachandran; D. M. H. Walker; Fred Lakbani; Jayashree Saxena; Kenneth M. Butler (ITC, 2000)

A case study on the implementation of the Illinois Scan Architecture. - Frank F. Hsu; Kenneth M. Butler; Janak H. Patel (ITC, 2001)

An analysis of power reduction techniques in scan testing. - Jayashree Saxena; Kenneth M. Butler; Lee Whetsel (ITC, 2001)

Defect-Oriented Testing and Defective-Part-Level Prediction. - Jennifer Dworak; Jason D. Wicker; Sooryong Lee; Michael R. Grimaila; M. Ray Mercer; Kenneth M. Butler; Bret Stewart; Li-C. Wang (IEEE Des. Test Comput., 2001)

Facilitating Rapid First Silicon Debug. - Hari Balachandran; Kenneth M. Butler; Neil Simpson (ITC, 2002)

Is ITC Bored with Board Test? - Kenneth M. Butler (ITC, 2002)

Scan-Based Transition Fault Testing - Implementation and Low Cost Test Challenges . - Jayashree Saxena; Kenneth M. Butler; John Gatt; R. Raghuraman; Sudheendra Phani Kumar; Supatra Basu; David J. Campbell; John Berech (ITC, 2002)

A Case Study of IR-Drop in Structured At-Speed Testing. - Jayashree Saxena; Kenneth M. Butler; Vinay B. Jayaram; Subhendu Kundu; N. V. Arvind; Pravin Sreeprakash; Manfred Hachinger (ITC, 2003)

Guest Editors' Introduction: Speed Test and Speed Binning for Complex ICs. - Kenneth M. Butler; Kwang-Ting (Tim) Cheng; Li-C. Wang (IEEE Des. Test Comput., 2003)

Sure You Can Get to 100 DPPM in Deep Submicron, But It'll Cost Ya. - Kenneth M. Butler (ITC, 2004)

Minimizing Power Consumption in Scan Testing: Pattern Generation and DFT Techniques. - Kenneth M. Butler; Jayashree Saxena; Tony Fryars; Graham Hetherington (ITC, 2004)

Guest Editor's Introduction: ITC Helps Get More Out of Test. - Kenneth M. Butler (IEEE Des. Test Comput., 2006)

Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs. - Mohammad Tehranipoor; Kenneth M. Butler (IEEE Des. Test Comput., 2007)

Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers. - Nisar Ahmed; Mohammad Tehranipoor; C. P. Ravikumar; Kenneth M. Butler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Modeling Test Escape Rate as a Function of Multiple Coverages. - Kenneth M. Butler; John M. Carulli Jr.; Jayashree Saxena (ITC, 2008)

Quality improvement and cost reduction using statistical outlier methods. - Amit Nahar; Kenneth M. Butler; John M. Carulli Jr.; Charles Weinberger (ICCD, 2009)

Multidimensional Test Escape Rate Modeling. - Kenneth M. Butler; John M. Carulli Jr.; Jayashree Saxena; Amit Nahar; W. Robert Daasch (IEEE Des. Test Comput., 2009)

Adapting to adaptive testing. - Erik Jan Marinissen; Adit D. Singh; Dan Glotter; Marco Esposito; John M. Carulli Jr.; Amit Nahar; Kenneth M. Butler; Davide Appello; Chris Portelli (DATE, 2010)

Adaptive test flow for mixed-signal/RF circuits using learned information from device under test. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ITC, 2010)

Power Supply Noise: A Survey on Effects and Research. - Mohammad Tehranipoor; Kenneth M. Butler (IEEE Des. Test Comput., 2010)

Test cost reduction through performance prediction using virtual probe. - Hsiu-Ming Chang 001; Kwang-Ting Cheng; Wangyang Zhang; Xin Li 001; Kenneth M. Butler (ITC, 2011)

Die-level adaptive test: Real-time test reordering and elimination. - Kapil R. Gotkhindikar; W. Robert Daasch; Kenneth M. Butler; John M. Carulli Jr.; Amit Nahar (ITC, 2011)

Adaptive multidimensional outlier analysis for analog and mixed signal circuits. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ITC, 2011)

Early prediction of NBTI effects using RTL source code analysis. - Jayanand Asok Kumar; Kenneth M. Butler; Heesoo Kim; Shobha Vasudevan (DAC, 2012)

Adaptive quality binning for analog circuits. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ETS, 2013)

A design-for-reliability approach based on grading library cells for aging effects. - Senthil Arasu; Mehrdad Nourani; John M. Carulli; Kenneth M. Butler; Vijay Reddy (ITC, 2013)

Test data analytics - Exploring spatial and test-item correlations in production test data. - Chun-Kai Hsu; Fan Lin; Kwang-Ting Cheng; Wangyang Zhang; Xin Li 001; John M. Carulli; Kenneth M. Butler (ITC, 2013)

Physics-Based Low-Cost Test Technique for High Voltage LDMOS. - Sukeshwar Kannan; Kaushal Kannan; Bruce C. Kim; Friedrich Taenzler; Richard Antley; Ken Moushegian; Kenneth M. Butler; Doug Mirizzi (J. Electron. Test., 2013)

Efficient Process Shift Detection and Test Realignment. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Per-Device Adaptive Test for Analog/RF Circuits Using Entropy-Based Process Monitoring. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling. - Shanghang Zhang; Xin Li 001; Ronald D. Blanton; José Machado da Silva; John M. Carulli Jr.; Kenneth M. Butler (ITC, 2014)

A fast spatial variation modeling algorithm for efficient test cost reduction of analog/RF circuits. - Hugo R. Gonçalves; Xin Li 001; Miguel V. Correia 002; Vítor Tavares; John M. Carulli Jr.; Kenneth M. Butler (DATE, 2015)

What we know after twelve years developing and deploying test data analytics solutions. - Kenneth M. Butler; Amit Nahar; W. Robert Daasch (ITC, 2016)

Statistical outlier screening as a test solution health monitor. - David Shaw; Dirk Hoops; Kenneth M. Butler; Amit Nahar (ITC, 2016)

Accurate ADC testing with significantly relaxed instrumentation including large cumulative jitter. - Li Xu; Yuming Zhuang; Rajavelu Thinakaran; Kenneth M. Butler; Degang Chen 001 (ITC, 2017)