BSIM4 parameter extraction for tri-gate Si nanowire transistors. - Chika Tanaka; Masumi Saitoh; Kensuke Ota; Takayuki Ishikawa; Toshinori Numata (Microelectron. J., 2016)

Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI. - Masumi Saitoh; Shosuke Fujii; Minoru Oda; Marina Yamaguchi; Shoichi Kabuyanagi; Yoko Yoshimura; Kensuke Ota; Kiwamu Sakuma; Yuuichi Kamimuta (ESSDERC, 2018)

Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor. - Yoko Yoshimura; Kensuke Ota; Masumi Saitoh (IRPS, 2018)

Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning. - Marina Yamaguchi; Shosuke Fujii; Kensuke Ota; Masumi Saitoh (IRPS, 2020)

Toward 7 Bits per Cell: Synergistic Improvement of 3D Flash Memory by Combination of Single-crystal Channel and Cryogenic Operation. - Hitomi Tanaka; Yuta Aiba; Takashi Maeda; Kensuke Ota; Yusuke Higashi; Keiichi Sawa; Fumie Kikushima; Masayuki Miura; Tomoya Sanuki (IMW, 2022)

Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization Dynamics. - Takamasa Hamai; Kunifumi Suzuki; Reika Ichihara; Yusuke Higashi; Yoko Yoshimura; Kiwamu Sakuma; Kensuke Ota; Kota Takahashi; Kazuhiro Matsuo; Shosuke Fujii; Masumi Saitoh (IRPS, 2023)