High-Speed Inverse Square Roots. - Michael J. Schulte; Kent E. Wires (IEEE Symposium on Computer Arithmetic, 1999)

FPGA Resource Reduction Through Truncated Multiplication. - Kent E. Wires; Michael J. Schulte; Don McCarley (FPL, 2001)

Combined IEEE Compliant and Truncated Floating Point Multipliers for Reduced Power Dissipation. - Kent E. Wires; Michael J. Schulte; James E. Stine (ICCD, 2001)

Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication. - Kent E. Wires; Michael J. Schulte (J. VLSI Signal Process., 2006)