Maximum Error-Aware Design of Approximate Array Multipliers. - Kenta Shirane; Takahiro Yamamoto; Ittetsu Taniguchi; Yuko Hara-Azumi; Shigeru Yamashita; Hiroyuki Tomiyama (ISOCC, 2019)

Scheduling with Variable-Cycle Approximate Functional Units in High-Level Synthesis. - Koyu Ohata; Kenta Shirane; Hiroki Nishikawa; Xiangbo Kong; Hiroyuki Tomiyama (ISOCC, 2021)

Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs. - Masaki Sano; Kenta Shirane; Hiroki Nishikawa; Xiangbo Kong; Hiroyuki Tomiyama; Tongxin Yang; Tomoaki Ukezono (ISOCC, 2021)

High-Level Synthesis of Approximate Computing Circuits with Dual Accuracy Modes. - Kenta Shirane; Hiroki Nishikawa; Xiangbo Kong; Hiroyuki Tomiyama (ISOCC, 2021)