Support Vector Machine-Based Feature Selection for Classification of Liver Fibrosis Grade in Chronic Hepatitis C. - Zheng Jiang 002; Kazunobu Yamauchi; Kentaro Yoshioka; Kazuma Aoki; Susumu Kuroyanagi; Akira Iwata; Jun Yang 007; Kai Wang (J. Medical Syst., 2006)

Efficacy of Interferon Treatment for Chronic Hepatitis C Predicted by Feature Subset Selection and Support Vector Machine. - Jun Yang 007; Anto Satriyo Nugroho; Kazunobu Yamauchi; Kentaro Yoshioka; Zheng Jiang 002; Kai Wang; Ken Kato; Susumu Kuroyanagi; Akira Iwata (J. Medical Syst., 2007)

An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator. - Kentaro Yoshioka; Akira Shikata; Ryota Sekimoto; Tadahiro Kuroda; Hiroki Ishikuro (ESSCIRC, 2012)

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC. - Kentaro Yoshioka; Akira Shikata; Ryota Sekimoto; Tadahiro Kuroda; Hiroki Ishikuro (ASP-DAC, 2013)

A voltage scaling 0.25-1.8 V delta-sigma modulator with inverter-opamp self-configuring amplifier. - Kentaro Yoshioka; Yosuke Toyama; Teruo Jyo; Hiroki Ishikuro (ISCAS, 2013)

An Adaptive DAC Settling Waiting Time Optimized Ultra Low Voltage Asynchronous SAR ADC in 40 nm CMOS. - Ryota Sekimoto; Akira Shikata; Kentaro Yoshioka; Tadahiro Kuroda; Hiroki Ishikuro (IEICE Trans. Electron., 2013)

A 4-10 bit, 0.4-1 V Power Supply, Power Scalable Asynchronous SAR-ADC in 40 nm-CMOS with Wide Supply Voltage Range SAR Controller. - Akira Shikata; Ryota Sekimoto; Kentaro Yoshioka; Tadahiro Kuroda; Hiroki Ishikuro (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS. - Ryota Sekimoto; Akira Shikata; Kentaro Yoshioka; Tadahiro Kuroda; Hiroki Ishikuro (IEEE J. Solid State Circuits, 2013)

An 8b extremely area efficient threshold configuring SAR ADC with source voltage shifting technique. - Kentaro Yoshioka; Akira Shikata; Ryota Sekimoto; Tadahiro Kuroda; Hiroki Ishikuro (ASP-DAC, 2014)

A 13b SAR ADC with eye-opening VCO based comparator. - Kentaro Yoshioka; Hiroki Ishikuro (ESSCIRC, 2014)

7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling subrange ADC with binary-search/flash Live Configuring Technique. - Kentaro Yoshioka; Ryo Saito; Takumi Danjo; Sanroku Tsukamoto; Hiroki Ishikuro (VLSIC, 2014)

Dynamic Architecture and Frequency Scaling in 0.8-1.2 GS/s 7 b Subranging ADC. - Kentaro Yoshioka; Ryo Saito; Takumi Danjo; Sanroku Tsukamoto; Hiroki Ishikuro (IEEE J. Solid State Circuits, 2015)

An 8 bit 0.3-0.8 V 0.2-40 MS/s 2-bit/Step SAR ADC With Successively Activated Threshold Configuring Comparators in 40 nm CMOS. - Kentaro Yoshioka; Akira Shikata; Ryota Sekimoto; Tadahiro Kuroda; Hiroki Ishikuro (IEEE Trans. Very Large Scale Integr. Syst., 2015)

28.7 A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique. - Kentaro Yoshioka; Tomohiko Sugimoto; Naoya Waki; Sinnyoung Kim; Daisuke Kurose; Hirotomo Ishii; Masanori Furuta; Akihide Sai; Tetsuro Itakura (ISSCC, 2017)

A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications. - Yosuke Toyama; Kentaro Yoshioka; Koichiro Ban; Akihide Sai; Kohei Onizuka (A-SSCC, 2018)

An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. - Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; et al. (ISSCC, 2018)

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. - Kentaro Yoshioka; Hiroshi Kubota; Tomonori Fukushima; Satoshi Kondo; Tuan Thanh Ta; Hidenori Okuni; Kaori Watanabe; Yoshinari Ojima; Katsuyuki Kimura; Sohichiroh Hosoda; Yutaka Ota; Tomohiro Koizumi; et al. (ISSCC, 2018)

PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators. - Kentaro Yoshioka; Yosuke Toyama; Koichiro Ban; Daisuke Yashima; Shigeru Maya; Akihide Sai; Kohei Onizuka (VLSI Circuits, 2018)

Training Domain Specific Models for Energy-Efficient Object Detection. - Kentaro Yoshioka; Edward Lee; Mark Horowitz (CoRR, 2018)

An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. - Shusuke Kawai; Rui Ito; Kengo Nakata; Yutaka Shimizu; Motoki Nagata; Tomohiko Takeuchi; Hiroyuki Kobayashi; Katsuyuki Ikeuchi; Takayuki Kato; Yosuke Hagiwara; Yuki Fujimura; Kentaro Yoshioka; et al. (IEEE J. Solid State Circuits, 2018)

A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. - Kentaro Yoshioka; Hiroshi Kubota; Tomonori Fukushima; Satoshi Kondo; Tuan Thanh Ta; Hidenori Okuni; Kaori Watanabe; Masatoshi Hirono; Yoshinari Ojima; Katsuyuki Kimura; Sohichiroh Hosoda; Yutaka Ota; et al. (IEEE J. Solid State Circuits, 2018)

Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models. - Kentaro Yoshioka; Edward Lee; Simon Wong; Mark Horowitz (ICIP, 2019)

An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators. - Yosuke Toyama; Kentaro Yoshioka; Koichiro Ban; Shigeru Maya; Akihide Sai; Kohei Onizuka (IEEE J. Solid State Circuits, 2019)

Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits. - Kentaro Yoshioka; Tomohiko Sugimoto; Naoya Waki; Sinnyoung Kim; Daisuke Kurose; Hirotomo Ishii; Masanori Furuta; Akihide Sai; Hiroki Ishikuro; Tetsuro Itakura (IEEE Trans. Very Large Scale Integr. Syst., 2019)

5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm2 Voltage/Time Dual-Data-Converter-Based AFE. - Satoshi Kondo; Hiroshi Kubota; Hisaaki Katagiri; Yutaka Ota; Masatoshi Hirono; Tuan Thanh Ta; Hidenori Okuni; Shinichi Ohtsuka; Yoshinari Ojima; Tomohiko Sugimoto; Hirotomo Ishii; Kentaro Yoshioka; et al. (ISSCC, 2020)

A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. - Tuan Thanh Ta; Hiroshi Kubota; Koichi Kokubun; Toshiki Sugimoto; Masatoshi Hirono; Mitsuhiro Sengoku; Hisaaki Katagiri; Hidenori Okuni; Satoshi Kondo; Shinichi Ohtsuka; Honam Kwon; Keita Sasaki; et al. (VLSI Circuits, 2020)

An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm2 Voltage/Time Dual-Data-Converter-Based AFE. - Satoshi Kondo; Hiroshi Kubota; Hisaaki Katagiri; Yutaka Ota; Masatoshi Hirono; Tuan Thanh Ta; Hidenori Okuni; Shinichi Ohtsuka; Yoshinari Ojima; Tomohiko Sugimoto; Hirotomo Ishii; Kentaro Yoshioka; et al. (IEEE J. Solid State Circuits, 2020)

Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections. - Kentaro Yoshioka; Hidenori Okuni; Tuan Thanh Ta; Akihide Sai (IROS, 2021)

VCO-Based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs. - Kentaro Yoshioka (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Poster: Towards Large-Scale Measurement Study on LiDAR Spoofing Attacks against Object Detection. - Takami Sato; Yuki Hayakawa; Ryo Suzuki; Yohsuke Shiiki; Kentaro Yoshioka; Qi Alfred Chen (CCS, 2022)

Time-Based Current Source: A Highly Digital Robust Current Generator for Switched Capacitor Circuits. - Kentaro Yoshioka (IEICE Trans. Electron., 2022)

A Tutorial and Review of Automobile Direct ToF LiDAR SoCs: Evolution of Next-Generation LiDARs. - Kentaro Yoshioka (IEICE Trans. Electron., 2022)

A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration. - Kaoru Yamashita; Benjamin P. Hershberg; Kentaro Yoshioka; Hiroki Ishikuro (CICC, 2023)

WIP: Practical Removal Attacks on LiDAR-based Object Detection in Autonomous Driving. - Takami Sato; Yuki Hayakawa; Ryo Suzuki; Yohsuke Shiiki; Kentaro Yoshioka; Qi Alfred Chen (VehicleSec, 2023)

An 818-TOPS/W CSNR-31dB SQNR-45dB 10-bit Capacitor-Reconfiguring Computing-in-Memory Macro with Software-Analog Co-Design for Transformers. - Kentaro Yoshioka (CoRR, 2023)

Revisiting LiDAR Spoofing Attack Capabilities against Object Detection: Improvements, Measurement, and New Attack. - Takami Sato; Yuki Hayakawa; Ryo Suzuki; Yohsuke Shiiki; Kentaro Yoshioka; Qi Alfred Chen (CoRR, 2023)

HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling. - Yung-Chin Chen; Shimpei Ando; Daichi Fujiki; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (CoRR, 2023)

OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. - Yung-Chin Chen; Shimpei Ando; Daichi Fujiki; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (ASPDAC, 2024)

PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation. - Wenlun Zhang; Shimpei Ando; Yung-Chin Chen; Satomi Miyagi; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (ICCAD, 2024)

34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers. - Kentaro Yoshioka (ISSCC, 2024)

LiDAR Spoofing Meets the New-Gen: Capability Improvements, Broken Assumptions, and New Attack Strategies. - Takami Sato; Yuki Hayakawa; Ryo Suzuki; Yohsuke Shiiki; Kentaro Yoshioka; Qi Alfred Chen (NDSS, 2024)

A Review of SRAM-based Compute-in-Memory Circuits. - Kentaro Yoshioka; Shimpei Ando; Satomi Miyagi; Yung-Chin Chen; Wenlun Zhang (CoRR, 2024)

ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework. - Wenlun Zhang; Shimpei Ando; Yung-Chin Chen; Kentaro Yoshioka (CoRR, 2024)

A 4.6-400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration. - Kaoru Yamashita; Benjamin P. Hershberg; Kentaro Yoshioka; Hiroki Ishikuro (IEEE J. Solid State Circuits, 2024)

A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique. - Kaoru Yamashita; Kentaro Yoshioka; Christian Ziegler; Vadim Issakov; Hiroki Ishikuro (CICC, 2025)

On the Realism of LiDAR Spoofing Attacks against Autonomous Driving Vehicle at High Speed and Long Distance. - Takami Sato; Ryo Suzuki; Yuki Hayakawa; Kazuma Ikeda; Ozora Sako; Rokuto Nagata; Ryo Yoshida; Qi Alfred Chen; Kentaro Yoshioka (NDSS, 2025)

LiSA: Leveraging Link Recommender to Attack Graph Neural Networks via Subgraph Injection. - Wenlun Zhang; Enyan Dai; Kentaro Yoshioka (PAKDD (4), 2025)

SLAMSpoof: Practical LiDAR Spoofing Attacks on Localization Systems Guided by Scan Matching Vulnerability Analysis. - Rokuto Nagata; Kenji Koide; Yuki Hayakawa; Ryo Suzuki; Kazuma Ikeda; Ozora Sako; Qi Alfred Chen; Takami Sato; Kentaro Yoshioka (CoRR, 2025)

AHCPTQ: Accurate and Hardware-Compatible Post-Training Quantization for Segment Anything Model. - Wenlun Zhang; Shimpei Ando; Kentaro Yoshioka (CoRR, 2025)

A 818-4094 TOPS/W Capacitor-Reconfigured Analog CIM for Unified Acceleration of CNNs and Transformers. - Kentaro Yoshioka (IEEE J. Solid State Circuits, 2025)

BasketLiDAR: The First LiDAR-Camera Multimodal Dataset for Professional Basketball MOT. - Ryunosuke Hayashi; Kohei Torimi; Rokuto Nagata; Kazuma Ikeda; Ozora Sako; Taichi Nakamura; Masaki Tani; Yoshimitsu Aoki; Kentaro Yoshioka (CoRR, 2025)