A novel four-quadrant analog multiplier using SOI four-gate transistors (G4-FETs). - Kerem Akarvardar; Suheng Chen; Benjamin J. Blalock; Sorin Cristoloveanu; Pierre Gentil; Mohammad M. Mojarradi (ESSCIRC, 2005)

SOI four-gate transistors (G4-FETs) for high voltage analog applications. - Suheng Chen; James Vandersand; Benjamin J. Blalock; Kerem Akarvardar; Sorin Cristoloveanu; Mohammad M. Mojarradi (ESSCIRC, 2005)

The G4-FET: a universal and programmable logic gate. - Amir Fijany; Farrokh Vatan; Mohammad M. Mojarradi; Nikzad Benny Toomarian; Benjamin J. Blalock; Kerem Akarvardar; Sorin Cristoloveanu; Pierre Gentil (ACM Great Lakes Symposium on VLSI, 2005)

High-temperature performance of state-of-the-art triple-gate transistors. - Kerem Akarvardar; Abdelkarim Mercha; Eddy Simoen; Vaidyanathan Subramanian; Cor Claeys; Pierre Gentil; Sorin Cristoloveanu (Microelectron. Reliab., 2007)

Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage. - Soogine Chong; Kerem Akarvardar; Roozbeh Parsa; Jun-Bo Yoon; Roger T. Howe; Subhasish Mitra; H.-S. Philip Wong (ICCAD, 2009)

Efficient FPGAs using nanoelectromechanical relays. - Chen Chen 018; Roozbeh Parsa; Nishant Patil; Soogine Chong; Kerem Akarvardar; J. Provine; David Lewis; Jeff Watt; Roger T. Howe; H.-S. Philip Wong; Subhasish Mitra (FPGA, 2010)

A Density Metric for Semiconductor Technology [Point of View]. - H.-S. Philip Wong; Kerem Akarvardar; Dimitri A. Antoniadis; Jeffrey Bokor; Chenming Hu; Tsu-Jae King Liu; Subhasish Mitra; James D. Plummer; Sayeef S. Salahuddin (Proc. IEEE, 2020)

Scanning the Issue. - H.-S. Philip Wong; Kerem Akarvardar; Dimitri A. Antoniadis; Jeffrey Bokor; Chenming Hu; Tsu-Jae King Liu; Subhasish Mitra; James D. Plummer; Sayeef S. Salahuddin; Lei Deng 003; Xin-Guo Li; Song Han 003; et al. (Proc. IEEE, 2020)

An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications. - Yu-Der Chih; Po-Hao Lee; Hidehiro Fujiwara; Yi-Chun Shih; Chia-Fu Lee; Rawan Naous; Yu-Lin Chen; Chieh-Pu Lo; Cheng-Han Lu; Haruki Mori; Wei-Cheng Zhao; Dar Sun; et al. (ISSCC, 2021)

A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS. - Mahmut E. Sinangil; Burak Erbagci; Rawan Naous; Kerem Akarvardar; Dar Sun; Win-San Khwa; Hung-Jen Liao; Yih Wang; Jonathan Chang (IEEE J. Solid State Circuits, 2021)

A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations. - Hidehiro Fujiwara; Haruki Mori; Wei-Chang Zhao; Mei-Chen Chuang; Rawan Naous; Chao-Kai Chuang; Takeshi Hashizume; Dar Sun; Chia-Fu Lee; Kerem Akarvardar; Saman Adham; Tan-Li Chou; et al. (ISSCC, 2022)

A 4nm 6163-TOPS/W/b $ mathbf{4790-TOPS/mm^{2}/b}$ SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update. - Haruki Mori; Wei-Chang Zhao; Cheng-En Lee; Chia-Fu Lee; Yu-Hao Hsu; Chao-Kai Chuang; Takeshi Hashizume; Hao-Chun Tung; Yao-Yi Liu; Shin-Rung Wu; Kerem Akarvardar; Tan-Li Chou; et al. (ISSCC, 2023)

Technology Prospects for Data-Intensive Computing. - Kerem Akarvardar; H.-S. Philip Wong (Proc. IEEE, 2023)

Non-volatile Memory Technologies for Edge AI Applications. - Xiaoyu Sun 001; Win-San Khwa; Xiaochen Peng; Meng-Fan Chang; Kerem Akarvardar (ICCAD, 2024)

34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell. - Hidehiro Fujiwara; Haruki Mori; Wei-Chang Zhao; Kinshuk Khare; Cheng-En Lee; Xiaochen Peng; Vineet Joshi; Chao-Kai Chuang; Shu-Huan Hsu; Takeshi Hashizume; Toshiaki Naganuma; Chen-Hung Tien; et al. (ISSCC, 2024)

Estimating Power, Performance, and Area for On-Sensor Deployment of AR/VR Workloads Using an Analytical Framework. - Xiaoyu Sun 001; Xiaochen Peng; Sai Qian Zhang; Jorge Gomez 002; Win-San Khwa; Syed Shakib Sarwar; Ziyun Li; Weidong Cao 001; Zhao Wang; Chiao Liu; Meng-Fan Chang; Barbara De Salvo; et al. (ACM Trans. Design Autom. Electr. Syst., 2024)

Efficient Processing of MLPerf Mobile Workloads Using Digital Compute-In-Memory Macros. - Xiaoyu Sun 001; Weidong Cao 001; Brian Crafton; Kerem Akarvardar; Haruki Mori; Hidehiro Fujiwara; Hiroki Noguchi; Yu-Der Chih; Meng-Fan Chang; Yih Wang; Tsung-Yung Jonathan Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Clo-HDnn: A 4.66 TFLOPS/W and 3.78 TOPS/W Continual On-Device Learning Accelerator with Energy-efficient Hyperdimensional Computing via Progressive Search. - Chang Eun Song; Weihong Xu; Keming Fan; Soumil Jain; Gopabandhu Hota; Haichao Yang; Leo Liu; Kerem Akarvardar; Meng-Fan Chang; Carlos H. Diaz; Gert Cauwenberghs; Tajana Rosing; et al. (CoRR, 2025)