Automatic transistor and physical design of FPGA tiles from an architectural specification. - Ketan Padalia; Ryan Fung; Mark Bourgeault; Aaron Egier; Jonathan Rose (FPGA, 2003)

Improving FPGA Performance and Area Using an Adaptive Logic Module. - Michael D. Hutton; Jay Schleicher; David M. Lewis; Bruce Pedersen; Richard Yuan; Sinan Kaptanoglu; Gregg Baeckler; Boris Ratchev; Ketan Padalia; Mark Bourgeault; Andy Lee; Henry Kim; et al. (FPL, 2004)

The Stratix II logic and routing architecture. - David M. Lewis; Elias Ahmed; Gregg Baeckler; Vaughn Betz; Mark Bourgeault; David Cashman; David R. Galloway; Mike Hutton; Christopher Lane; Andy Lee; Paul Leventis; Sandy Marquardt; et al. (FPGA, 2005)

High-quality, deterministic parallel placement for FPGAs on commodity hardware. - Adrian Ludwin; Vaughn Betz; Ketan Padalia (FPGA, 2008)