Titan: Enabling large and complex benchmarks in academic CAD. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (FPL, 2013)

From Quartus to VPR: Converting HDL to BLIF with the Titan flow. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (FPL, 2013)

Quantifying the cost and benefit of latency insensitive communication on FPGAs. - Kevin E. Murray; Vaughn Betz (FPGA, 2014)

HETRIS: Adaptive floorplanning for heterogeneous FPGAs. - Kevin E. Murray; Vaughn Betz (FPT, 2015)

Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2015)

Quantifying error: Extending static timing analysis with probabilistic transitions. - Kevin E. Murray; Andrea Suardi; Vaughn Betz; George A. Constantinides (DATE, 2017)

Tatum: Parallel Timing Analysis for Faster Design Cycles and Improved Optimization. - Kevin E. Murray; Vaughn Betz (FPT, 2018)

Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis. - Kevin E. Murray; Andrea Suardi; Vaughn Betz; George A. Constantinides (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

AIR: A Fast but Lazy Timing-Driven FPGA Router. - Kevin E. Murray; Sheng Zhong; Vaughn Betz (ASP-DAC, 2020)

Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves. - Mohamed A. Elgammal; Kevin E. Murray; Vaughn Betz (FPT, 2020)

SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs. - Kevin E. Murray; Mohamed A. Elgammal; Vaughn Betz; Tim Ansell; Keith Rothman; Alessandro Comodi (IEEE Micro, 2020)

VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling. - Kevin E. Murray; Oleg Petelin; Sheng Zhong; Jia Min Wang; Mohamed Eldafrawy; Jean-Philippe Legault; Eugene Sha; Aaron Graham; Jean Wu; Matthew J. P. Walker; Hanqing Zeng; Panagiotis Patros; et al. (ACM Trans. Reconfigurable Technol. Syst., 2020)

Optimizing FPGA Logic Block Architectures for Arithmetic. - Kevin E. Murray; Jason Luu; Matthew J. P. Walker; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2020)

RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement. - Mohamed A. Elgammal; Kevin E. Murray; Vaughn Betz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Respect the Difference: Reinforcement Learning for Heterogeneous FPGA Placement. - Fatemehsadat Mahmoudi; Mohamed A. Elgammal; Soheil Gholami Shahrouz; Kevin E. Murray; Vaughn Betz (ICFPT, 2023)