Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing. - Guillaume Prenat; Kotb Jabeur; Pierre Vanhauwaert; Gregory di Pendina; Fabian Oboril; Rajendra Bishnoi; Mojtaba Ebrahimi; Nathalie Lamard; Olivier Boulle; Kevin Garello; Juergen Langer; Berthold Ocker; et al. (IEEE Trans. Multi Scale Comput. Syst., 2016)

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories. - Kevin Garello; Kevin Garello Yasin; S. Couet; Laurent Souriau; Johan Swerts; Sidharth Rao; Simon Van Beek; Wonsub Kim; Enlong Liu; Shreya Kundu; Diana Tsvetanova; Kris Croes; et al. (VLSI Circuits, 2018)

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories. - Kevin Garello; Kevin Garello Yasin; S. Couet; Laurent Souriau; Johan Swerts; Sidharth Rao; Simon Van Beek; Wonsub Kim; Enlong Liu; Shreya Kundu; Diana Tsvetanova; Kris Croes; et al. (VLSI Circuits, 2018)

SOT-MRAM 300mm integration for low power and ultrafast embedded memories. - Kevin Garello; Farrukh Yasin; S. Couet; Laurent Souriau; Johan Swerts; Sidharth Rao; Simon Van Beek; Wonsub Kim; Enlong Liu; Shreya Kundu; Diana Tsvetanova; N. Jossart; et al. (CoRR, 2018)

Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects. - Sarath Mohanachandran Nair; Rajendra Bishnoi; Mehdi Baradaran Tahoori; Houman Zahedmanesh; Kristof Croes; Kevin Garello; Gouri Sankar Kar; Francky Catthoor (IRPS, 2019)

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM. - Kevin Garello; Farrukh Yasin; Hubert Hody; S. Couet; Laurent Souriau; Shamin H. Sharifi; Johan Swerts; Robert Carpenter; Sidharth Rao; Wonsub Kim; J. Wu; K. K. V. Sethu; et al. (VLSI Circuits, 2019)

Physics based modeling of bimodal electromigration failure distributions and variation analysis for VLSI interconnects. - Sarath Mohanachandran Nair; Rajendra Bishnoi; Mehdi B. Tahoori; Houman Zahedmanesh; Kristof Croes; Kevin Garello; Gouri Sankar Kar; Francky Catthoor (IRPS, 2020)

A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses. - Joao Henrique Quintino Palhares; Yann Beilliard; Jury Sandrini; Franck Arnaud; Kevin Garello; Guillaume Prenat; Lorena Anghel; Fabien Alibart; Dominique Drouin; Philippe Galy (CoRR, 2023)

Intrinsic Annealing in a Hybrid Memristor-Magnetic Tunnel Junction Ising Machine. - Mohammed Akib Iftakher; Hugo Levices; Kamel-Eddine Harabi; Adrien Renaudineau; Mathieu-Coumba Faye; Corentin Bouchard; Florian Disdier; Bernard Viala; Elisa Vianello; Philippe Talatchian; Kevin Garello; Damien Querlioz; et al. (CoRR, 2025)