Generating At-Speed Array Fail Maps with Low-Speed ATE. - Michael R. Nelms; Kevin W. Gorman; Darren Anand (VTS, 2004)

Synchronization methods for supporting distributed 3D virtual environments in JavaTM. - Kevin W. Gorman; Daneyand Singley; Yuichi Motai (Advances in Computer Entertainment Technology, 2005)

A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining. - John E. Barth Jr.; Darren Anand; Steve Burns 001; Jeffrey H. Dreibelbis; John A. Fifield; Kevin W. Gorman; Michael R. Nelms; Erik Nelson; Adrian Paparelli; Gary Pomichter; Dale E. Pontius; Stephen Sliva (IEEE J. Solid State Circuits, 2005)

Low Cost Test of High Bandwidth Embedded Memories. - Kevin W. Gorman; Darren Anand; Gary Pomichter; William R. Corbin (CICC, 2006)

A 1.0GHz multi-banked embedded DRAM in 65nm CMOS featuring concurrent refresh and hierarchical BIST. - Darren Anand; Jim Covino; Jeffrey H. Dreibelbis; John A. Fifield; Kevin W. Gorman; Mark Jacunski; Jake Paparelli; Gary Pomichter; Dale E. Pontius; Michael Roberge; Stephen Sliva (CICC, 2007)

Advancements in at-speed array BIST: multiple improvements. - Kevin W. Gorman; Michael Roberge; Adrian Paparelli; Gary Pomichter; Stephen Sliva; William Corbin (ITC, 2007)

Synchronous collaborative systems for distributed virtual environments in Java. - Kevin W. Gorman; Daneyand Singley; Yuichi Motai (Int. J. Comput. Appl. Technol., 2007)

Embedded DRAM in 45-nm Technology and Beyond. - Darren Anand; Kevin W. Gorman; Mark Jacunski; Adrian Paparelli (IEEE Des. Test Comput., 2011)

Optimizing delay tests at the memory boundary. - Kelly A. Ockunzzi; Michael R. Ouellette; Kevin W. Gorman (ITC, 2015)

Practical Application of RAM Sequential Test. - Kelly A. Ockunzzi; Michael R. Ouellette; Kevin W. Gorman (IEEE Des. Test, 2016)