A high level FPGA-based abstract machine for image processing. - Ahmed Bouridane; Danny Crookes; Paul Donachy; Khalid Alotaibi; Khaled Benkrid (J. Syst. Archit., 1999)

High level programming for real time FPGA based video processing. - Khaled Benkrid; Danny Crookes; J. Smith; Abdsamad Benkrid (ICASSP, 2000)

Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA. - Abdsamad Benkrid; Danny Crookes; Khaled Benkrid (FCCM, 2001)

High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons. - Khaled Benkrid; Danny Crookes; J. Smith; Abdsamad Benkrid (FCCM, 2001)

Design and implementation of a 2D convolution core for video applications on FPGAs. - Khaled Benkrid; Samir Belkacemi (DCV, 2002)

A Prolog-Based Hardware Development Environment. - Khaled Benkrid; Danny Crookes; Abdsamad Benkrid; Samir Belkacemi (FPL, 2002)

HIDE: a logic based hardware intelligent description environment. - Samir Belkacemi; Khaled Benkrid; Danny Crookes (FPT, 2002)

A multiplier-less FPGA core for image algebra neighbourhood operations. - Khaled Benkrid (FPT, 2002)

Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (FPT, 2002)

Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. - Khaled Benkrid; Danny Crookes; Abdsamad Benkrid (ISCAS (4), 2002)

Towards a general framework for FPGA based image processing using hardware skeletons. - Khaled Benkrid; Danny Crookes; Abdsamad Benkrid (Parallel Comput., 2002)

A Logic Based Hardware Development Environment. - Samir Belkacemi; Khaled Benkrid; Danny Crookes (FCCM, 2003)

Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (FCCM, 2003)

A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (FCCM, 2003)

A logic based approach to hardware abstraction. - Khaled Benkrid; Samir Belkacemi; Danny Crookes (FPGA, 2003)

Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. - Abdsamad Benkrid; Danny Crookes; Khaled Benkrid (FPGA, 2003)

A single-FPGA implementation of image connected component labelling. - Khaled Benkrid; S. Sukhsawas; Danny Crookes; Samir Belkacemi (FPGA, 2003)

Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (FPL, 2003)

An FPGA-Based Image Connected Component Labeller. - Khaled Benkrid; S. Sukhsawas; Danny Crookes; Abdsamad Benkrid (FPL, 2003)

A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (ICASSP (2), 2003)

Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (ISSPA (2), 2003)

New bit-level algorithm for general purpose median filtering. - Khaled Benkrid; Danny Crookes (J. Electronic Imaging, 2003)

Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. - Abdsamad Benkrid; Khaled Benkrid; Danny Crookes (ISVLSI, 2004)

A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. - S. Sukhsawas; Khaled Benkrid (ISVLSI, 2004)

From application descriptions to hardware in seconds: a logic-based approach to bridging the gap. - Khaled Benkrid; Danny Crookes (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. - Arjun K. Pai; Khaled Benkrid; Danny Crookes (CAMP, 2005)

An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). - Khaled Benkrid; Samir Belkacemi (FPGA, 2005)

HIDE: A hardware intelligent description environment. - Khaled Benkrid; Samir Belkacemi; Abdsamad Benkrid (Microprocess. Microsystems, 2006)

Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. - Abdsamad Benkrid; Khaled Benkrid (Signal Process., 2006)

Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications. - Arjun K. Pai; Khaled Benkrid (ERSA, 2007)

Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. - Khaled Benkrid; Ying Liu 003; Abdsamad Benkrid (FCCM, 2007)

High Performance Biosequence Database Scanning using FPGAs. - Khaled Benkrid; Ying Liu 003; Abdsamad Benkrid (ICASSP (1), 2007)

Efficient FPGA hardware development: A multi-language approach. - Khaled Benkrid; Abdsamad Benkrid; Samir Belkacemi (J. Syst. Archit., 2007)

A High Performance Reconfigurable Core for Motif Searching Using Profile HMM. - Khaled Benkrid; Panagiotis Velentzas; Server Kasap (AHS, 2008)

High performance FPGA-based core for BLAST sequence alignment with the two-hit method. - Server Kasap; Khaled Benkrid; Ying Liu 003 (BIBE, 2008)

Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications. - Arjun K. Pai; Khaled Benkrid (ERSA, 2008)

Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer. - Xiang Tian 001; Khaled Benkrid (FPT, 2008)

Massively Parallelized Quasi-Monte Carlo financial Simulation on a FPGA Supercomputer. - Xiang Tian 001; Khaled Benkrid (HPRCTA@SC, 2008)

HIDE+: A Logic Based Hardware Development Environment. - Abdsamad Benkrid; Khaled Benkrid (Eng. Lett., 2008)

Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. - Server Kasap; Khaled Benkrid; Ying Liu 003 (Eng. Lett., 2008)

High Performance Monte-Carlo Based Option Pricing on FPGAs. - Xiang Tian 001; Khaled Benkrid; Xiaochen Gu (Eng. Lett., 2008)

Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs. - Xuezheng Chu; Khaled Benkrid; John Thompson (AHS, 2009)

A Comparative Study on ASIC, FPGAs, GPUs and General Purpose Processors in the O(N^2) Gravitational N-body Simulation. - Tsuyoshi Hamada; Khaled Benkrid; Keigo Nitadori; Makoto Taiji (AHS, 2009)

An FPGA-Based Web Server for High Performance Biological Sequence Alignment. - Ying Liu 003; Khaled Benkrid; Abdsamad Benkrid; Server Kasap (AHS, 2009)

Mersenne Twister Random Number Generation on FPGA, CPU and GPU. - Xiang Tian 001; Khaled Benkrid (AHS, 2009)

A high performance fpga-based implementation of position specific iterated blast. - Server Kasap; Khaled Benkrid; Ying Liu 003 (FPGA, 2009)

A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs. - Cheng Ling; Khaled Benkrid; Tsuyoshi Hamada (SASP, 2009)

A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. - Tsuyoshi Hamada; Keigo Nitadori; Khaled Benkrid; Yousuke Ohno; Gentaro Morimoto; Tomonari Masada; Yuichiro Shibata; Kiyoshi Oguri; Makoto Taiji (Comput. Sci. Res. Dev., 2009)

Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension. - Abdsamad Benkrid; Khaled Benkrid (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. - Khaled Benkrid; Ying Liu 003; Abdsamad Benkrid (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Adaptive and evolvable hardware security architectures. - Wael Adi; Khaled Benkrid (AHS, 2010)

Ultimate design security in self-reconfiguring non-volatile environments. - Wael Adi; Khaled Benkrid (AHS, 2010)

R3TOS: A reliable reconfigurable real-time operating system. - Xabier Iturbe; Khaled Benkrid; Ahmet T. Erdogan; Tughrul Arslan; Mikel Azkarate-askasua; Imanol Martinez; Antonio Perez (AHS, 2010)

Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. - Keisuke Dohi; Khaled Benkrid; Cheng Ling; Tsuyoshi Hamada; Yuichiro Shibata (ASAP, 2010)

A Roadmap for Autonomous Fault-Tolerant Systems. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Imanol Martinez; Mikel Azkarate-askasua; Marco D. Santambrogio (DASIP, 2010)

Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Imanol Martinez; Mikel Azkarate-askasua; Alicia Morales-Reyes (ERSA, 2010)

ATB: Area-Time response Balancing algorithm for scheduling real-time hardware tasks. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Imanol Martinez; Mikel Azkarate-askasua (FPT, 2010)

Fixed-Point Arithmetic Error Estimation in Monte-Carlo Simulations. - Xiang Tian 001; Khaled Benkrid (ReConFig, 2010)

Design and implementation of a CUDA-compatible GPU-based core for gapped BLAST algorithm. - Cheng Ling; Khaled Benkrid (ICCS, 2010)

High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU. - Xiang Tian 001; Khaled Benkrid (ACM Trans. Reconfigurable Technol. Syst., 2010)

Embedded high-speed Model Predictive Controller on a FPGA. - Koldo Basterretxea; Khaled Benkrid (AHS, 2011)

An FPGA task allocator with preliminary First-Fit 2D packing algorithms. - Chuan Hong; Khaled Benkrid; Xabier Iturbe; Ahmet T. Erdogan; Tughrul Arslan (AHS, 2011)

FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data. - Hanaa M. Hussain; Khaled Benkrid; Huseyin Seker; Ahmet T. Erdogan (AHS, 2011)

An FPGA-based parameterised and scalable optimal solutions for pairwise biological sequence analysis. - Mohd Nazrin Md. Isa; Khaled Benkrid; Thomas Clayton; Cheng Ling; Ahmet T. Erdogan (AHS, 2011)

Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Chuan Hong; Ahmet T. Erdogan; Imanol Martinez (AHS, 2011)

A high performance implementation for Molecular Dynamics simulations on a FPGA supercomputer. - Server Kasap; Khaled Benkrid (AHS, 2011)

High performance Intra-task parallelization of Multiple Sequence Alignments on CUDA-compatible GPUs. - Cheng Ling; Khaled Benkrid; Ahmet T. Erdogan (AHS, 2011)

A (Fault-Tolerant)2 Scheduler for Real-Time HW Tasks. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Mikel Azkarate-askasua; Imanol Martinez (ARC, 2011)

Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Raul Torrego; Imanol Martinez (FPL, 2011)

Highly Parameterized K-means Clustering on FPGAs: Comparative Results with GPPs and GPUs. - Hanaa M. Hussain; Khaled Benkrid; Ahmet T. Erdogan; Huseyin Seker (ReConFig, 2011)

Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence. - Xabier Iturbe; Khaled Benkrid; Tughrul Arslan; Chuan Hong; Imanol Martinez (ReConFig, 2011)

Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing. - Xabier Iturbe; Khaled Benkrid; Ali Ebrahim; Chuan Hong; Tughrul Arslan; Imanol Martinez (ReConFig, 2011)

Efficient On-Chip Task Scheduler and Allocator for Reconfigurable Operating Systems. - Chuan Hong; Khaled Benkrid; Xabier Iturbe; Ali Ebrahim; Tughrul Arslan (IEEE Embed. Syst. Lett., 2011)

High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware. - Server Kasap; Khaled Benkrid (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A novel high-performance fault-tolerant ICAP controller. - Ali Ebrahim; Khaled Benkrid; Xabier Iturbe; Chuan Hong (AHS, 2012)

Real-time CCSDS lossless adaptive hyperspectral image compression on parallel GPGPU & multicore processor systems. - Ben Hopson; Khaled Benkrid; Didier Keymeulen; Nazeeh Aranki (AHS, 2012)

An adaptive implementation of a dynamically reconfigurable K-nearest neighbour classifier on FPGA. - Hanaa M. Hussain; Khaled Benkrid; Huseyin Seker (AHS, 2012)

Online clock routing in Xilinx FPGAs for high-performance and reliability. - Xabier Iturbe; Khaled Benkrid; Raul Torrego; Ali Ebrahim; Tughrul Arslan (AHS, 2012)

Design and implementation of fault-tolerant soft processors on FPGAs. - Chuan Hong; Khaled Benkrid; Xabier Iturbe; Ali Ebrahim (FPL, 2012)

An adaptive FPGA implementation of multi-core K-nearest neighbour ensemble classifier using dynamic partial reconfiguration. - Hanaa M. Hussain; Khaled Benkrid; Chuan Hong; Huseyin Seker (FPL, 2012)

IP-XACT extensions for IP interoperability guarantees and software model generation. - Thomas P. Perry; Richard L. Walke; Rob Payne; Stefan Petko; Khaled Benkrid (FPL, 2012)

Data coding functions for Software Defined Radios implemented on R3TOS. - Raul Torrego; Inaki Val; Eñaut Muxika; Xabier Iturbe; Khaled Benkrid (FPL, 2012)

A generic computer platform for efficient iris recognition. - Chris Ponder; Khaled Benkrid; Abdsamad Benkrid (ICB, 2012)

A novel efficient FPGA architecture for HMMER acceleration. - Mohd Nazrin Md. Isa; Khaled Benkrid; Thomas Clayton (ReConFig, 2012)

High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP. - Khaled Benkrid; Ali Akoglu; Cheng Ling; Yang Song 007; Ying Liu 003; Xiang Tian 001 (Int. J. Reconfigurable Comput., 2012)

High-Performance Reconfigurable Computing. - Khaled Benkrid; Esam El-Araby; Miaoqing Huang; Kentaro Sano; Thomas Steinke 001 (Int. J. Reconfigurable Comput., 2012)

Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs. - Hanaa M. Hussain; Khaled Benkrid; Ali Ebrahim; Ahmet T. Erdogan; Huseyin Seker (Int. J. Reconfigurable Comput., 2012)

Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA-Based Supercomputer. - Server Kasap; Khaled Benkrid (J. Comput., 2012)

Digital Hardware Design Teaching: An Alternative Approach. - Khaled Benkrid; Thomas Clayton (ACM Trans. Comput. Educ., 2012)

Efficient architecture and scheduling technique for pairwise sequence alignment. - Mohd Nazrin Md. Isa; Khaled Benkrid; Thomas Clayton (SIGARCH Comput. Archit. News, 2012)

High performance phylogenetic analysis on CUDA-compatible GPUs. - Cheng Ling; Khaled Benkrid; Tsuyoshi Hamada (SIGARCH Comput. Archit. News, 2012)

Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA. - Xiang Tian 001; Khaled Benkrid (J. Signal Process. Syst., 2012)

Preface. - Khaled Benkrid; Didier Keymeulen; David Merodio; Michael Newell; Rainer Wansch; Umeshkumar D. Patel; Ahmet T. Erdogan; Niels Hadaschik; Luca Sterpone; Jelle Poupaert; Massimo Violante (AHS, 2013)

Multiple-clone configuration of relocatable partial bitstreams in Xilinx Virtex FPGAs. - Ali Ebrahim; Khaled Benkrid; Xabier Iturbe; Chuan Hong (AHS, 2013)

Reconfiguration-based implementation of SVM classifier on FPGA for Classifying Microarray data. - Hanaa M. Hussain; Khaled Benkrid; Huseyin Seker (EMBC, 2013)

Reconfigurable feeding network for GSM/GPS/3G/WiFi and global LTE applications. - Wei Zhou; Tughrul Arslan; Khaled Benkrid; Ahmed O. El-Rayis; Nakul Haridas (ISCAS, 2013)

A platform for secure IP integration in Xilinx Virtex FPGAs. - Ali Ebrahim; Khaled Benkrid; Jalal Khalifat; Chuan Hong (ReConFig, 2013)

Analysis and characterization of embedded vision systems for taxonomy formulation. - Muhammad Imran 021; Khaled Benkrid; Khursheed Khursheed; Naeem Ahmad 001; Mattias O'Nils; Najeem Lawal (Real-Time Image and Video Processing, 2013)

A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures. - Abdsamad Benkrid; Khaled Benkrid (Digit. Signal Process., 2013)

Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence. - Xabier Iturbe; Khaled Benkrid; Chuan Hong; Ali Ebrahim; Tughrul Arslan; Imanol Martinez (Int. J. Reconfigurable Comput., 2013)

A run-time reconfigurable system for adaptive high performance efficient computing. - Chuan Hong; Khaled Benkrid; Mohd Nazrin Md. Isa; Xabier Iturbe (SIGARCH Comput. Archit. News, 2013)

Guest Editors' introduction: Special section on adaptive hardware and systems. - Khaled Benkrid; Didier Keymeulen; Umeshkumar D. Patel; David Merodio Codinachs (IEEE Trans. Computers, 2013)

R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs. - Xabier Iturbe; Khaled Benkrid; Chuan Hong; Ali Ebrahim; Raul Torrego; Imanol Martinez; Tughrul Arslan; Jon Pérez 001 (IEEE Trans. Computers, 2013)

R3TOS-Based Autonomous Fault-Tolerant Systems. - Xabier Iturbe; Ali Ebrahim; Khaled Benkrid; Chuan Hong; Tughrul Arslan; Jon Pérez 001; Didier Keymeulen; Marco D. Santambrogio (IEEE Micro, 2014)

Dynamic partial reconfiguration implementation of the SVM/KNN multi-classifier on FPGA for bioinformatics application. - Hanaa M. Hussain; Khaled Benkrid; Huseyin Seker (EMBC, 2015)

Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS). - Xabier Iturbe; Khaled Benkrid; Chuan Hong; Ali Ebrahim; Raul Torrego; Tughrul Arslan (ACM Trans. Reconfigurable Technol. Syst., 2015)