An 8-b 1.3-MHz successive-approximation A/D converter. - Khayrollah Hadidi; Vincent S. Tso; Gabor C. Temes (IEEE J. Solid State Circuits, 1990)

A Novel Input Differential Pair for Improved Linearity Buffer and S/H Amplifier Design. - Khayrollah Hadidi; Gabor C. Temes (ISCAS, 1994)

A highly linear cascode-driver CMOS source-follower buffer. - Khairollah Hadidi; Abdullah Khoei (ICECS, 1996)

Microprocessor based closed-loop speed control system for DC motor using power MOSFET. - Abdullah Khoei; Khairollah Hadidi (ICECS, 1996)

An open-loop full CMOS 103 MHz -61 dB THD S/H circuit. - Khayrollah Hadidi; Masahiro Sasaki; Tadatoshi Watanabe; Daigo Muramatsu; Takashi Matsumoto 001 (CICC, 1998)

A highly linear second-order stage for 500-MHz third-order and fifth-order filters. - Khayrollah Hadidi; K. Eguchi; Takashi Matsumoto 001; Haruo Kobayashi 001 (ICECS, 1998)

A 300 MHz 18 dB variable gain amplifier. - Khayrollah Hadidi; Mahta Jenabi; Jafar Sobhi-Gheshlaghi; A. Hasankhaan (ICECS, 1998)

A novel highly linear CMOS buffer. - Khayrollah Hadidi; Jafar Sobhi-Gheshlaghi; A. Hasankhaan; Daigo Muramatsu; Takashi Matsumoto 001 (ICECS, 1998)

A novel design technique for input differential pairs in single-ended operational amplifiers. - M. Morimoto; Khayrollah Hadidi; K. Futami; T. Matsumoto (ICECS, 1998)

Design of an analog CMOS fuzzy logic controller chip. - Hamed Peyravi; Abdollah Khoei; Khayrollah Hadidi (Fuzzy Sets Syst., 2002)

A highly linear fully differential low power CMOS line driver. - Khayrollah Hadidi; Hiroyuki Oshima; Masahiro Sasaki; Takashi Matsumoto 001 (ESSCIRC, 2003)

Design of a CMOS image sensor with pixel-level ADC in 0.35µm process. - F. Hashemi; Khayrollah Hadidi; Abdollah Khoei (ISCAS (2), 2003)

A CMOS 310MHz, 20dB Variable Gain Amplifier. - Khayrollah Hadidi; Abdollah Khoei; Mahta Jenabi; Hamed Peyravi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Fuzzy level control of a tank with optimum valve movement. - Abdollah Khoei; Khayrollah Hadidi; M. R. Khorasani; R. Amirkhanzadeh (Fuzzy Sets Syst., 2005)

A Low-Power, Small-Size 10-Bit Successive-Approximation ADC. - Mehdi Banihashemi; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A Highly Linear and Large Bandwidth Fully Differential CMOS Line Driver Suitable for High-Speed Data Transmission Applications. - Mostafa Savadi Oskooei; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A New Method for Offset Cancellation in High-Resolution High-Speed Comparators. - Jafar Sobhi-Gheshlaghi; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2005)

A 1.5-V, Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier. - Akram Masoom; Khayrollah Hadidi (ICECS, 2006)

Design of Analog Current-Mode Loser-Take-All Circuit. - Mohsen Asloni; Abdollah Khoei; Khayrollah Hadidi (IEICE Trans. Electron., 2006)

Modified CMOS Op-Amp with Improved Gain and Bandwidth. - Mahdi Mottaghi-Kashtiban; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2006)

A High Speed and Compact Mixed-Signal CMOS Fuzzifier. - Arash Esmaili; Abdollah Khoei; Khayrollah Hadidi (J. Circuits Syst. Comput., 2006)

Design of a High Speed, Low Latency and Low Power Consumption DRAM Using two-transistor Cell Structure. - Amin Chegeni; Khayrollah Hadidi; Abdollah Khoei (ICECS, 2007)

An Open Loop Phase Shifter and Frequency Synthesizer. - Sarang Kazeminia; Khayrollah Hadidi (ICECS, 2007)

High Speed, Low Power Four-Quadrant CMOS Current-Mode Multiplier. - Ali Naderi; Abdollah Khoei; Khayrollah Hadidi (ICECS, 2007)

A New ANFIS Based Learning Algorithm for CMOS Neuro-Fuzzy Controllers. - Alireza Peymanfar; Abdollah Khoei; Khayrollah Hadidi (ICECS, 2007)

Design of A New CMOS Controllable Mixed-Signal Current Mode Fuzzy Logic Controller (FLC) Chip. - Ghader Yosefi; Abdollah Khoei; Khayrollah Hadidi (ICECS, 2007)

Design of a New Folded Cascode Op-Amp Using Positive Feedback and Bulk Amplification. - Mohsen Asloni; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2007)

A Current-Mode, First-Order Takagi-Sugeno-Kang Fuzzy Logic Controller, Supporting Rational-Powered Membership Functions. - Mahdi Mottaghi-Kashtiban; Abdollah Khoei; Khayrollah Hadidi (IEICE Trans. Electron., 2007)

High Speed High Precision voltage-Mode Max and Min Circuits. - Sarang Kazeminia; Abdollah Khoei; Khayrollah Hadidi (J. Circuits Syst. Comput., 2007)

Optimization of rational-powered membership functions using extended Kalman filter. - Mahdi Mottaghi-Kashtiban; Abdollah Khoei; Khayrollah Hadidi (Fuzzy Sets Syst., 2008)

A Novel Open Loop Structure for Phase Shifting and Frequency Synthesizing. - Sarang Kazeminia; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

A new fully differential adaptive CMOS line driver suitable for ADSL applications. - Ali Dadashi; Khayrollah Hadidi; Abdollah Khoei (ECCTD, 2009)

A CMOS 3.2 GB/s serial link transceiver, using PWM and PAM scheme. - Nooshin Ghaderi; Khayrollah Hadidi (ECCTD, 2009)

Design of high-speed high-precision voltage-mode MAX-MIN circuits with low area and low power consumption. - Mohammad Soleimani; Abdollah Khoei; Khayrollah Hadidi; Sarang Kazeminia (ECCTD, 2009)

A new linear readout circuit for a CMOS image sensor. - Masood Teymouri; Khayrollah Hadidi; Abdollah Khoei (ECCTD, 2009)

Design of Voltage-Mode MAX-MIN Circuits with Low Area and Low Power Consumption. - Mohammad Soleimani; Abdollah Khoei; Khayrollah Hadidi; Vahid Fagih Dinavari (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection. - Sarang Kazeminia; Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (APCCAS, 2010)

A highly linear open-loop high-speed CMOS sample-and-hold. - Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (APCCAS, 2010)

Current-mode analog CMOS Fuzzy Logic Controller. - Mohammad Soleimani; Abdollah Khoei; Khayrollah Hadidi (APCCAS, 2010)

CMOS model selection for simulation using fuzzy inference system. - Edris Azadi; Abdollah Khoei; Khayrollah Hadidi (IEICE Electron. Express, 2010)

A 1GS/s low-power low-kickback noise comparator in CMOS process. - Ali Baradaranrezaeii; Roozbeh Abdollahi; Khayrollah Hadidi; Abdollah Khoei (ECCTD, 2011)

Effect of bandgap energy temperature dependence on thermal coefficient of bandgap reference voltage. - Sarang Kazeminia; Khayrollah Hadidi; Abdollah Khoei; Mohammad-Naghi Azarmanesh (ECCTD, 2011)

Fast and flexible genetic algorithm processor. - Pourya Hoseini; Abdollah Khoei; Khayrollah Hadidi; Sajjad Moshfe (ICECS, 2011)

A highly accurate fully programmable fuzzifier in current mode approach. - Sajjad Moshfe; Abdollah Khoei; Khayrollah Hadidi (ICECS, 2011)

Design of a programmable analog CMOS rational-powered membership function generator in current mode approach. - Sajjad Moshfe; Abdollah Khoei; Khayrollah Hadidi; Pourya Hoseini (ICECS, 2011)

High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adder. - Habib Ghasemizadeh Tamar; Akbar Ghasemizadeh Tamar; Khayrollah Hadidi; Abdollah Khoei; Pourya Hoseini (ICECS, 2011)

A 500 MS/s 600 µW 300 µm2 Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS Process. - Sarang Kazeminia; Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2011)

Digitally-controlled Gm-C bandpass filter. - Guanglei Jin; Hao Chen; Chuan Gao; Yunpeng Zhang; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Khayrollah Hadidi (APCCAS, 2012)

A novel quantization algorithm suitable for high-speed analog-to-digital converters. - Nasim Soufizadeh-Balaneji; Khayrollah Hadidi (APCCAS, 2012)

Input dependent clock jitter in high speed and high resolution ADCs. - Amin Chegeni; Reza Shayanfar; Khayrollah Hadidi; Abdollah Khoei (ISCAS, 2012)

CMOS implementation of a fast 4-2 compressor for parallel accumulations. - Amir Fathi; Sarkis Azizian; Khayrollah Hadidi; Abdollah Khoei; Amin Chegeni (ISCAS, 2012)

Ultra High Speed Modified Booth Encoding Architecture for High Speed Parallel Accumulations. - Amir Fathi; Sarkis Azizian; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2012)

A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations. - Amir Fathi; Sarkis Azizian; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2012)

Improved single-stage kickback-rejected comparator for high speed and low noise flash ADCs. - Sarang Kazeminia; Obalit Shino; Ehsan Haghighi; Khayrollah Hadidi (ECCTD, 2013)

A high speed and fully tunable MFG with new programmable CMOS OTA and new MIN circuit. - Alireza Abolhasani; Mohammad Tohidi; Morteza Mousazadeh; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2013)

The sundial based sun-tracking system with AVR microcontroller. - Mostafa Amirpour; Morteza Mousazadeh; Mohammad Tohidi; Khayrollah Hadidi (MIXDES, 2013)

A circuit implementation of an ultra high speed, low power analog fully programmable MFG. - Mohammad Tohidi; Alireza Abolhasani; Morteza Mousazadeh; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2013)

CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations. - Mohammad Tohidi; Morteza Mousazadeh; Saeed Akbari; Khayrollah Hadidi; Abdollah Khoei (MIXDES, 2013)

CMOS implementation of a new high speed 5-2 compressor for parallel accumulations. - Mohammad Tohidi; Alireza Abolhasani; Khayrollah Hadidi; Abdollah Khoei (IEICE Electron. Express, 2013)

A highly accurate fuzzifier in current mode with low power consumption. - Amin Akbari; Mehdi Ghasemzadeh; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2014)

A novel fast glitchless 4-2 compressor with a new structure. - Mehdi Ghasemzadeh; Amin Akbari; Khayrollah Hadidi; Abdollah Khoei (MIXDES, 2014)

A novel mixed-signal digital voltage mode CMOS fuzzy logic controller in 0.18μm technology. - Mehdi Ghasemzadeh; Amin Akbari; Abdullah Khoei; Khayrollah Hadidi (MIXDES, 2014)

A novel method in fractional synthesizers for a drastic decrease in lock time. - Mehdi Ghasemzadeh; Amin Akbari; Neda Mohabbatian; Khayrollah Hadidi; Abdullah Khoei (MIXDES, 2014)

A novel mixed-signal digital CMOS fuzzy logic controller in current mode. - Mehdi Ghasemzadeh; Amin Akbari; Arefeh Soltani; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2014)

A novel fast glitchless 7-3 counter with a new structure. - Mehdi Ghasemzadeh; Neda Mohabbatian; Amin Akbari; Khayrollah Hadidi; Abdullah Khoei (MIXDES, 2014)

A novel high-speed 4-bit carry generator with a new structure for arithmetic operations. - Mehdi Ghasemzadeh; Neda Mohabbatian; Amin Akbari; Khayrollah Hadidi; Abdullah Khoei (MIXDES, 2014)

A Fully Programmable Analog CMOS Rational-Powered Membership Function Generator with Continuously Adjustable High Precision Parameters. - Sajjad Moshfe; Pourya Hoseini; Abdollah Khoei; Khayrollah Hadidi (Circuits Syst. Signal Process., 2014)

A Wide-Range Programmable Pulse Width controller. - Hadiseh Babazadeh; Arash Esmaili; Khayrollah Hadidi; Abdollah Khoei (J. Circuits Syst. Comput., 2014)

A Low Power 13-Bit 50MS/S Recirculating Pipeline Analog to Digital Converter. - Arash Esmaili; Hadiseh Babazadeh; Khayrollah Hadidi; Abdollah Khoei (J. Circuits Syst. Comput., 2014)

A Fast and Low Settling error continuous-Time Common-mode feedback Circuit Based on differential difference amplifier. - Tohid Moradi Khaneshan; Saeed Naghavi; Mojde Nematzade; Khayrollah Hadidi; Adib Abrishamifar; Abdollah Khoei (J. Circuits Syst. Comput., 2014)

100 MS/S, 10-Bit ADC using Pipelined Successive Approximation. - Sahar Sarafi; Kheyrollah Hadidi; Ebrahim Abbaspour; Abu Khari bin A'Ain; Javad Abbaszadeh (J. Circuits Syst. Comput., 2014)

Design of current-mode modular programmable analog CMOS FLC. - Mohammad Soleimani; Abdollah Khoei; Khayrollah Hadidi (J. Intell. Fuzzy Syst., 2014)

A circuit implementation of an ultra high speed, low power analog fully programmable MFG. - Mohammad Tohidi; Alireza Abolhasani; Abdollah Khoei; Khayrollah Hadidi (J. Intell. Fuzzy Syst., 2014)

An ultra high speed booth encoder structure for fast arithmetic operations. - Mehdi Ghasemzadeh; Amin Akbari; Khayrollah Hadidi (MIXDES, 2015)

A new ultra high speed 7-2 compressor with a new structure. - Mehdi Ghasemzadeh; Amin Akbari; Arefeh Soltani; Khayrollah Hadidi (MIXDES, 2015)

A 6-bit 800MS/s flash ADC in 0.35μm CMOS. - Mehdi Ghasemzadeh; Arefeh Soltani; Amin Akbari; Khayrollah Hadidi (MIXDES, 2015)

Fast and accurate fractional frequency synthesizer in 0.18μm technology. - Mehdi Ghasemzadeh; Arefeh Soltani; Amin Akbari; Khayrollah Hadidi (MIXDES, 2015)

CMOS fuzzy logic controller supporting fractional polynomial membership functions. - Majid Mokarram; Abdollah Khoei; Khayrollah Hadidi (Fuzzy Sets Syst., 2015)

High gain two-stage amplifier with positive capacitive feedback compensation. - Alireza Mesri; Mahmoud Mahdipour Pirbazari; Khayrollah Hadidi; Abdollah Khoei (IET Circuits Devices Syst., 2015)

High speed, open loop residue amplifier with linearity improvement. - Mahmoud Mahdipour Pirbazari; Khayrollah Hadidi; Abdollah Khoei; Shamim Sadrafshari (IET Circuits Devices Syst., 2015)

High Speed Min/Max Architecture Based on a Novel Comparator in 0.18-μm CMOS Process. - Amir Fathi; Abdollah Khoei; Khayrollah Hadidi (J. Circuits Syst. Comput., 2015)

A Wide-Range Low-Jitter PLL Based on Fast-Response VCO and Simplified Straightforward Methodology of Loop Stabilization in Integer-N PLLs. - Sarang Kazeminia; Khayrollah Hadidi; Abdollah Khoei (J. Circuits Syst. Comput., 2015)

A 80-MHz-to-410-MHz 16-Phases DLL Based on Improved Dead-Zone Open-Loop Phase Detector and Reduced-Gain Charge Pump. - Sarang Kazeminia; Sobhan Sofimowloodi; Khayrollah Hadidi (J. Circuits Syst. Comput., 2015)

Analysis and Design of a Precise Voltage Buffer. - Tohid Moradi Khaneshan; Mojde Nematzade; Khayrollah Hadidi; Abdollah Khoei (J. Circuits Syst. Comput., 2015)

CMOS implementation of a current-mode fully programmable interval type-2 fuzzifier. - Alireza Mesri; Mahmoud Mahdipour Pirbazari; Abdollah Khoei; Khayrollah Hadidi (J. Intell. Fuzzy Syst., 2015)

Power and area reduction in CMOS analog fuzzy logic controllers by using a new inference engine structure. - Mahmoud Mahdipour Pirbazari; Alireza Mesri; Abdollah Khoei; Khayrollah Hadidi (J. Intell. Fuzzy Syst., 2015)

A new adaptive PLL to reduce the lock time in 0.18µm technology. - Mehdi Ghasemzadeh; Sina Mahdavi; Abolfazl Zokaei; Khayrollah Hadidi (MIXDES, 2016)

A new ultra high speed 5-2 compressor with a new structure. - Mehdi Ghasemzadeh; Sina Mahdavi; Abolfazl Zokaei; Khayrollah Hadidi (MIXDES, 2016)

Digitally-assisted offset cancellation technique for open loop residue amplifiers in high-resolution and high-speed ADCs. - Sarang Kazeminia; Sina Mahdavi; Khayrollah Hadidi (MIXDES, 2016)

An 8B/10B encoder with 2GHz operating frequency. - Hamed Ashrafi; Morteza Mousazadeh; Khayrollah Hadidi (MWSCAS, 2016)

A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits. - Roozbeh Abdollahi; Khayrollah Hadidi; Abdollah Khoei (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

High-Speed General Purpose Genetic Algorithm Processor. - Seyed Pourya Hoseini Alinodehi; Sajjad Moshfe; Masoumeh Saber Zaeimian; Abdollah Khoei; Khairollah Hadidi (IEEE Trans. Cybern., 2016)

A low-power, fully programmable membership function generator using both transconductance and current modes. - Yousef Valizadeh Yaghmourali; Amir Fathi; Mina Hassanzadazar; Abdollah Khoei; Khayrollah Hadidi (Fuzzy Sets Syst., 2018)

Low-jitter spread spectrum clock generator using charge pump frequency detector in 0.18 μm CMOS for USB3.1 transceivers. - Shamim Sadrafshari; Razieh Eskandari; Khayrollah Hadidi; Abdollah Khoei (IET Circuits Devices Syst., 2018)

A foreground-liked continuous-time offset cancellation strategy for open-loop inter-stage amplifiers in high-resolution ADCs. - Sarang Kazeminia; Khayrollah Hadidi (Integr., 2018)

A Histogram-Based Background Interstage Error Estimation and Implementation Method in Pipelined ADCs. - Amin Chegeni; Khayrollah Hadidi; Abdollah Khoei (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A fuzzy Anti-lock braking system (ABS) controller using CMOS circuits. - Majid Mokarram; Abdollah Khoei; Khayrollah Hadidi (Microprocess. Microsystems, 2019)

A New Adaptive Prioritization and Fail-Over Mechanism for Ring Network Adapter. - Amin Khalilzadegan; Mohammad Zarei; Khayrollah Hadidi (IEEE Access, 2020)

Design Analysis and Evaluation of a W-Element Model for a Twisted-Pair Cable. - Mohammad Zarei; Amin Khalilzadegan; Khayrollah Hadidi (IEEE Access, 2020)

A new mixed-signal CMOS fuzzy logic controller in current mode. - Mehdi Ghasemzadeh; Khayrollah Hadidi (J. Intell. Fuzzy Syst., 2020)

A New Low Power Mixed-Signal Digital Voltage Mode CMOS Fuzzy Logic Controller. - Mehdi Ghasemzadeh; Khayrollah Hadidi (Circuits Syst. Signal Process., 2021)

A 12-Gb/s serial link transceiver using dual-mode pulse amplitude modulation scheme in a 0.18-μm CMOS process. - Neda Mohabbatian; Khayrollah Hadidi (Int. J. Circuit Theory Appl., 2021)

A new background continuous-time offset cancelation and gain calibration strategy for open-loop residue amplifiers in high-speed and high-resolution ADC's. - Mehdi Ghasemzadeh; Khayrollah Hadidi (Int. J. Circuit Theory Appl., 2022)