SoftUPS: eliminating the need and cost of battery backups in the developing world. - Zohaib Sharani; Khushboo Qayyum; Noman Bashir; Affan A. Syed (e-Energy, 2014)

Enabling Practical Demand Response in Highly-Stressed Grids Using Aashiyana. - Muhammad Zohaib Akram Sharani; Noman Bashir; Khushboo Qayyum; Affan A. Syed (e-Energy, 2015)

Delivering smart load-shedding for highly-stressed grids. - Noman Bashir; Zohaib Sharani; Khushboo Qayyum; Affan A. Syed (SmartGridComm, 2015)

LLMs for Hardware Verification: Frameworks, Techniques, and Future Directions. - Khushboo Qayyum; Sallar Ahmadi-Pour; Chandan Kumar Jha 001; Muhammad Hassan 002; Rolf Drechsler (ATS, 2024)

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification. - Khushboo Qayyum; Muhammad Hassan 002; Sallar Ahmadi-Pour; Chandan Kumar Jha 001; Rolf Drechsler (DAC, 2024)

LLM-Guided Formal Verification Coupled with Mutation Testing. - Muhammad Hassan 002; Sallar Ahmadi-Pour; Khushboo Qayyum; Chandan Kumar Jha 001; Rolf Drechsler (DATE, 2024)

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. - Khushboo Qayyum; Abhoy Kole; Kamalika Datta; Muhammad Hassan 002; Rolf Drechsler (ACM Great Lakes Symposium on VLSI, 2024)

EnR: extend and reduce methodology to enable formal verification of truncated adders. - Chandan Kumar Jha 001; Khushboo Qayyum; Muhammad Hassan 001; Rolf Drechsler (it Inf. Technol., 2024)

veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing. - Chandan Kumar Jha 001; Khushboo Qayyum; Kemal Çaglar Coskun; Simranjeet Singh; Muhammad Hassan 002; Rainer Leupers; Farhad Merchant; Rolf Drechsler (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Prompt. Verify. Repeat. LLMs in the Hardware Verification Cycle. - Muhammad Hassan 002; Mohamed A. Nadeem; Khushboo Qayyum; Chandan Kumar Jha 001; Rolf Drechsler (COINS, 2025)

Large Language Models (LLMs) for Verification, Testing, and Design. - Chandan Kumar Jha 001; Muhammad Hassan 001; Khushboo Qayyum; Sallar Ahmadi-Pour; Kangwei Xu; Ruidi Qiu; Jason Blocklove; Luca Collini; Andre Nakkab; Ulf Schlichtmann; Grace Li Zhang; Ramesh Karri; et al. (ETS, 2025)

FARAD: Automated Formal Verification of Approximate Restoring Array Dividers. - Chandan Kumar Jha 001; Khushboo Qayyum; Muhammad Hassan 001; Rolf Drechsler (VLSID, 2025)

Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders With Correct Carry Bits. - Chandan Kumar Jha 001; Khushboo Qayyum; Muhammad Hassan 002; Rolf Drechsler (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)