A 2.5Gb/s/pin 256Mb GDDR3 SDRAM with Series Pipelined CAS Latency Control and Dual-Loop Digital DLL. - Dong-Uk Lee; Hyun-Woo Lee; Ki Chang Kwean; Young-Kyoung Choi; Hyong Uk Moon; Seung-Wook Kwack; Shin-Deok Kang; Kwan-Weon Kim; Yong Ju Kim; Young-Jung Choi; Patrick B. Moran; Jin-Hong Ahn; et al. (ISSCC, 2006)