On the Comparison Between Single and Multiple Processor Systems. - Edward G. Coffman Jr.; Kimming So (ISCA, 1980)

Deterministic Scheduling with Pipelined Processors. - John L. Bruno; John W. Jones III; Kimming So (IEEE Trans. Computers, 1980)

A Stochastic Model of Bin-Packing - Edward G. Coffman Jr.; Kimming So; Micha Hofri; Andrew Chi-Chih Yao (Inf. Control., 1980)

A Speedup Analyzer for Parallel Programs. - Anthony Bolmarcich; Kimming So; Frederica Darema; V. Alan Norton (ICPP, 1987)

Cache Design of a Sub-Micron CMOS System/370. - J. H. Chang; H. Chao; Kimming So (ISCA, 1987)

Memory Access Patterns of Parallel Scientific Programs. - Frederica Darema; Gregory F. Pfister; Kimming So (SIGMETRICS, 1987)

Cache Performance of Vector Processors. - Kimming So; Vittorio Zecca (ISCA, 1988)

Program Locality of Vectorized Applications Running on the IBM 3090 with Vector Facility. - Kimming So; Vittorio Zecca (IBM Syst. J., 1988)

Cache Operations by MRU Change. - Kimming So; Rudolph N. Rechtschaffen (IEEE Trans. Computers, 1988)

Performance Visualization of Parallel Programs on a Shared Memory Multiprocessor System. - David B. Bernstein; Anthony Bolmarcich; Kimming So (ICPP (2), 1989)

Trace Driven Simulation for Studying MIMD Parallel Computers. - Manoj Kumar; Kimming So (ICPP (1), 1989)

Inter-Section Locality of Shared Data in Parallel Programs. - Jih-Kwon Peir; Kimming So; Ju-Ho Tang (ICPP (1), 1991)

Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation. - Shien-Tai Pan; Kimming So; Joseph T. Rahmeh (ASPLOS, 1992)

Techniques to Enhance Cache Performance Across Parallel Program Sections. - Jih-Kwon Peir; Kimming So; Ju-Ho Tang (ICPP (1), 1993)

Performance and Design Choices of Level-Two Caches. - Ju-Ho Tang; Kimming So (HICSS (1), 1994)

Guest Editors' Introduction: Computer Architecture Simulations. - Kimming So; Wen-Hann Wang (Int. J. Comput. Simul., 1996)