Reconfiguration Mechanism for an IP Block Based Interconnection. - Kimmo Kuusilinna; Pasi Liimatainen; Timo Hämäläinen 001; Jukka Saarinen (EUROMICRO, 1999)

Practical VHDL optimization for timing critical FPGA applications. - Kimmo Kuusilinna; Timo Hämäläinen 001; Jukka Saarinen (Microprocess. Microsystems, 1999)

Field programmable gate array-based PCI interface for a coprocessor system. - Kimmo Kuusilinna; Timo Hämäläinen 001; Jukka Saarinen (Microprocess. Microsystems, 1999)

Reuseable interface in multimedia hardware environment. - Vesa Lahtinen; Kimmo Kuusilinna; Timo Hämäläinen 001; Tero Kangas; Jukka Saarinen (EUSIPCO, 2000)

Interfacing multiple processors in a system-on-chip video encoder. - Erno Salminen; Timo D. Hämäläinen; Tero Kangas; Kimmo Kuusilinna; Jukka Saarinen (ISCAS (4), 2001)

Enhanced Configurable Parallel Memory Architecture. - Jarno Vanne; Eero Aho; Kimmo Kuusilinna; Timo D. Hämäläinen (DSD, 2002)

TDMA-based communication scheduling in system-on-chip video encoder. - Tero Kangas; Kimmo Kuusilinna; Timo Hämäläinen 001 (ISCAS (1), 2002)

Optimizing finite state machines for system-on-chip communication. - Vesa Lahtinen; Kimmo Kuusilinna; Timo Hämäläinen 001 (ISCAS (1), 2002)

Parameter optimization tool for enhancing on-chip network performance. - Jouni Riihimäki; Erno Salminen; Kimmo Kuusilinna; Timo Hämäläinen 001 (ISCAS (4), 2002)

Configurable parallel memory architecture for multimedia computers. - Kimmo Kuusilinna; Jarno K. Tanskanen; Timo Hämäläinen 001; Jarkko Niittylahti (J. Syst. Archit., 2002)

Interconnection scheme for continuous-media systems-on-a-chip. - Vesa Lahtinen; Kimmo Kuusilinna; Tero Kangas; Timo Hämäläinen 001 (Microprocess. Microsystems, 2002)

Distributing SoC Simulations over a Network of Computers. - Jouni Riihimäki; Väinö Helminen; Kimmo Kuusilinna; Timo D. Hämäläinen (DSD, 2003)

Implementation of BEE: a real-time large-scale hardware emulation engine. - Chen Chang; Kimmo Kuusilinna; Brian C. Richards; Robert W. Brodersen (FPGA, 2003)

Comparison of synthesized bus and crossbar interconnection architectures. - Vesa Lahtinen; Erno Salminen; Kimmo Kuusilinna; Timo D. Hämäläinen (ISCAS (5), 2003)

Using a communication generator in SoC architecture exploration. - Tero Kangas; Jouni Riihimäki; Erno Salminen; Kimmo Kuusilinna; Timo D. Hämäläinen (SoC, 2003)

Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. - Chen Chang; Kimmo Kuusilinna; Brian C. Richards; Allen Chen; Nathan Chan; Robert W. Brodersen; Borivoje Nikolic (IEEE International Workshop on Rapid System Prototyping, 2003)

Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications. - Kimmo Kuusilinna; Chen Chang; M. Josephine Ammer; Brian C. Richards; Robert W. Brodersen (EURASIP J. Adv. Signal Process., 2003)

Describing MIMO designs for rapid prototyping in the BEE environment. - Kimmo Kuusilinna; Chen Chang; Hans-Martin Blüthgen; Danijela Cabric; Brian C. Richards; Robert W. Brodersen (EUSIPCO, 2004)

Practical distributed simulation of a network of wireless terminals. - Jouni Riihimäki; Petri Kukkala; Erno Salminen; Marko Hännikäinen; Kimmo Kuusilinna; Timo D. Hämäläinen (SoC, 2004)

Comparison of hardware IP components for system-on-chip. - Erno Salminen; Kimmo Kuusilinna; Timo D. Hämäläinen (SoC, 2004)

A Communication-Centric Design Flow for HIBI-Based SoCs. - Tero Kangas; Jouni Riihimäki; Erno Salminen; Vesa Lahtinen; Heikki Orsila; Kimmo Kuusilinna; Timo D. Hämäläinen (SAMOS, 2004)

HIBI v.2 Communication Network for System-on-Chip. - Erno Salminen; Vesa Lahtinen; Tero Kangas; Jouni Riihimäki; Kimmo Kuusilinna; Timo D. Hämäläinen (SAMOS, 2004)

Address Computation in Configurable Parallel Memory Architecture. - Eero Aho; Jarno Vanne; Kimmo Kuusilinna; Timo D. Hämäläinen (IEICE Trans. Inf. Syst., 2004)

Block-level parallel processing for scaling evenly divisible frames. - Eero Aho; Jarno Vanne; Kimmo Kuusilinna; Timo Hämäläinen 001 (ISCAS (2), 2005)

Block-level parallel processing for scaling evenly divisible images. - Eero Aho; Jarno Vanne; Timo D. Hämäläinen; Kimmo Kuusilinna (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Comments on "Winscale: an image-scaling algorithm using an area pixel Model". - Eero Aho; Jarno Vanne; Kimmo Kuusilinna; Timo D. Hämäläinen (IEEE Trans. Circuits Syst. Video Technol., 2005)

A High-Performance Sum of Absolute Difference Implementation for Motion Estimation. - Jarno Vanne; Eero Aho; Timo Hämäläinen 001; Kimmo Kuusilinna (IEEE Trans. Circuits Syst. Video Technol., 2006)

UML-based multiprocessor SoC design framework. - Tero Kangas; Petri Kukkala; Heikki Orsila; Erno Salminen; Marko Hännikäinen; Timo D. Hämäläinen; Jouni Riihimäki; Kimmo Kuusilinna (ACM Trans. Embed. Comput. Syst., 2006)

Scalable Architecture for SoC Video Encoders. - Tero Kangas; Timo D. Hämäläinen; Kimmo Kuusilinna (J. VLSI Signal Process., 2006)

HIBI Communication Network for System-on-Chip. - Erno Salminen; Tero Kangas; Timo D. Hämäläinen; Jouni Riihimäki; Vesa Lahtinen; Kimmo Kuusilinna (J. VLSI Signal Process., 2006)

Benchmarking mesh and hierarchical bus networks in system-on-chip context. - Erno Salminen; Tero Kangas; Vesa Lahtinen; Jouni Riihimäki; Kimmo Kuusilinna; Timo D. Hämäläinen (J. Syst. Archit., 2007)

Configurable implementation of parallel memory based real-time video downscaler. - Eero Aho; Jarno Vanne; Timo D. Hämäläinen; Kimmo Kuusilinna (Microprocess. Microsystems, 2007)

A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms. - Jarno Vanne; Eero Aho; Timo D. Hämäläinen; Kimmo Kuusilinna (IEEE Trans. Circuits Syst. Video Technol., 2008)

A case for multi-channel memories in video recording. - Eero Aho; Jari Nikara; Petri A. Tuominen; Kimmo Kuusilinna (DATE, 2009)

Performance analysis of multi-channel memories in mobile devices. - Jari Nikara; Eero Aho; Petri A. Tuominen; Kimmo Kuusilinna (SoC, 2009)

Memory access characteristics of H.264 video encoder on embedded processor. - Eero Aho; Kimmo Kuusilinna; Jari Nikara (SiPS, 2009)

A Configurable Motion Estimation Architecture for Block-Matching Algorithms. - Jarno Vanne; Eero Aho; Kimmo Kuusilinna; Timo D. Hämäläinen (IEEE Trans. Circuits Syst. Video Technol., 2009)

Towards real-time applications in mobile web browsers. - Eero Aho; Kimmo Kuusilinna; Tomi Aarnio; Janne Pietiainen; Jari Nikara (ESTIMedia, 2012)