Buffer allocation for advanced packet segmentation in Network Processors. - Daniel Llorente; Kimon Karras; Thomas Wild; Andreas Herkersdorf (ASAP, 2008)

Aeronautical Mobile Ad Hoc Networks. - Kimon Karras; Theodore Kyritsis; Massimiliano Amirfeiz; Stefano Baiotti (EW, 2008)

An embedded dynamically self-reconfigurable Master-Slaves MPSoC architecture. - Kimon Karras; Elias S. Manolakos (FPL, 2008)

Improving memory subsystem performance in network processors with smart packet segmentation. - Kimon Karras; Daniel Llorente; Thomas Wild; Andreas Herkersdorf (ICSAMOS, 2008)

A folded pipeline network processor architecture for 100 Gbit/s networks. - Kimon Karras; Thomas Wild; Andreas Herkersdorf (ANCS, 2010)

Advanced Packet Segmentation and Buffering Algorithms in Network Processors. - Daniel Llorente; Kimon Karras; Thomas Wild; Andreas Herkersdorf (Trans. High Perform. Embed. Archit. Compil., 2011)

Achieving 10Gbps Line-rate Key-value Stores with FPGAs. - Michaela Blott; Kimon Karras; Ling Liu; Kees A. Vissers; Jeremia Bär; Zsolt István (HotCloud, 2013)

A network processor architecture for high speed carrier grade ethernet networks. - Kimon Karras (2013)

High-Level Synthesis Case Study: Implementation of a Memcached Server. - Kimon Karras; Michaela Blott; Kees A. Vissers (CoRR, 2014)

Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. - João Andrade; Nithin George; Kimon Karras; David Novo; Vítor Manuel Mendes da Silva; Paolo Ienne; Gabriel Falcão Paiva Fernandes (FCCM, 2015)

Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware. - David Sidler; Gustavo Alonso; Michaela Blott; Kimon Karras; Kees A. Vissers; Raymond Carley (FCCM, 2015)

From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. - João Andrade; Nithin George; Kimon Karras; David Novo; Vítor Manuel Mendes da Silva; Paolo Ienne; Gabriel Falcão Paiva Fernandes (FPL, 2015)

Scaling Out to a Single-Node 80Gbps Memcached Server with 40Terabytes of Memory. - Michaela Blott; Ling Liu; Kimon Karras; Kees A. Vissers (HotStorage, 2015)

Design Space Exploration of LDPC Decoders Using High-Level Synthesis. - João Andrade; Nithin George; Kimon Karras; David Novo; Frederico Pratas; Leonel Sousa; Paolo Ienne; Gabriel Falcão 001; Vítor Silva 001 (IEEE Access, 2017)

Computing, Caching, and Communication at the Edge: The Cornerstone for Building a Versatile 5G Ecosystem. - Evangelos K. Markakis; Kimon Karras; Anargyros Sideris; George Alexiou; Evangelos Pallis (IEEE Commun. Mag., 2017)

EXEGESIS: Extreme Edge Resource Harvesting for a Virtualized Fog Environment. - Evangelos K. Markakis; Kimon Karras; Nikolaos Zotos; Anargyros Sideris; Theoharris Moysiadis; Angelo Corsaro; George Alexiou; Charalabos Skianis; George Mastorakis; Constandinos X. Mavromoustakis; Evangelos Pallis (IEEE Commun. Mag., 2017)

A Hardware Acceleration Platform for AI-Based Inference at the Edge. - Kimon Karras; Evangelos Pallis; George Mastorakis; Yannis Nikoloudakis; Jordi Mongay Batalla; Constandinos X. Mavromoustakis; Evangelos K. Markakis (Circuits Syst. Signal Process., 2020)