Statistical static timing analysis: how simple can we get? - Chirayu S. Amin; Noel Menezes; Kip Killpack; Florentin Dartu; Umakanta Choudhury; Nagib Hakim; Yehea I. Ismail (DAC, 2005)

A multi-port current source model for multiple-input switching effects in CMOS library cells. - Chirayu S. Amin; Chandramouli V. Kashyap; Noel Menezes; Kip Killpack; Eli Chiprout (DAC, 2006)

FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling. - Debasish Das; Ahmed Shebaita; Hai Zhou 001; Yehea I. Ismail; Kip Killpack (ICCD, 2006)

Silicon Speedpath Measurement and Feedback into EDA flows. - Kip Killpack; Chandramouli V. Kashyap; Eli Chiprout (DAC, 2007)

NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits. - Debasish Das; Ahmed Shebaita; Yehea I. Ismail; Hai Zhou 001; Kip Killpack (ACM Great Lakes Symposium on VLSI, 2007)

Speedpath prediction based on learning from a small set of examples. - Pouria Bastani; Kip Killpack; Li-C. Wang; Eli Chiprout (DAC, 2008)

Silicon feedback to improve frequency of high-performance microprocessors: an overview. - Chandramouli V. Kashyap; Pouria Bastani; Kip Killpack; Chirayu S. Amin (ICCAD, 2008)

Case Study on Speed Failure Causes in a Microprocessor. - Kip Killpack; Suriyaprakash Natarajan; Arun Krishnamachary; Pouria Bastani (IEEE Des. Test Comput., 2008)

Pessimism Reduction in Coupling-Aware Static Timing Analysis Using Timing and Logic Filtering. - Debasish Das; Kip Killpack; Chandramouli V. Kashyap; Abhijit Jas; Hai Zhou 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

FA-STAC: An Algorithmic Framework for Fast and Accurate Coupling Aware Static Timing Analysis. - Debasish Das; Ahmed Shebaita; Hai Zhou 001; Yehea I. Ismail; Kip Killpack (IEEE Trans. Very Large Scale Integr. Syst., 2011)