Multicast on Irregular Switch-Based Networks with Wormhole Routing. - Ram Kesavan; Kiran Bondalapati; Dhabaleswar K. Panda 001 (HPCA, 1997)

Mapping Loops onto Reconfigurable Architectures. - Kiran Bondalapati; Viktor K. Prasanna (FPL, 1998)

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures. - Kiran Bondalapati; Viktor K. Prasanna (FCCM, 1999)

DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems. - Kiran Bondalapati; Viktor K. Prasanna (FPL, 1999)

DEFACTO: A Design Environment for Adaptive Computing Technology. - Kiran Bondalapati; Pedro C. Diniz; Phillip Duncan; John J. Granacki; Mary W. Hall; Rajeev Jain; Heidi E. Ziegler (IPPS/SPDP Workshops, 1999)

Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures. - Kiran Bondalapati; Viktor K. Prasanna (PDPTA, 1999)

Loop Pipelining and Optimization for Run Time Reconfiguration. - Kiran Bondalapati; Viktor K. Prasanna (IPDPS Workshops, 2000)

Dynamic Data Layouts for Cache-Conscious Factorization of DFT. - Neungsoo Park; Dongsoo Kang; Kiran Bondalapati; Viktor K. Prasanna (IPDPS, 2000)

Parallelizing DSP Nested Loops on Reconfigurable Architectures using Data Context Switching. - Kiran Bondalapati (DAC, 2001)

Reconfigurable computing systems. - Kiran Bondalapati; Viktor K. Prasanna (Proc. IEEE, 2002)