Improved SAT-based Boolean matching using implicants for LUT-based FPGAs. - Jason Cong; Kirill Minkovich (FPGA, 2007)

Optimality Study of Logic Synthesis for LUT-Based FPGAs. - Jason Cong; Kirill Minkovich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Mapping for better than worst-case delays in LUT-based FPGA designs. - Kirill Minkovich; Jason Cong (FPGA, 2008)

LUT-based FPGA technology mapping for reliability. - Jason Cong; Kirill Minkovich (DAC, 2010)

Accelerating Monte Carlo based SSTA using FPGA. - Jason Cong; Karthik Gururaj; Wei Jiang 035; Bin Liu 006; Kirill Minkovich; Bo Yuan; Yi Zou (FPGA, 2010)

LUT-based FPGA technology mapping for reliability (abstract only). - Jason Cong; Kirill Minkovich (FPGA, 2010)

Programming Time-Multiplexed Reconfigurable Hardware Using a Scalable Neuromorphic Compiler. - Kirill Minkovich; Narayan Srinivasa; Jose M. Cruz-Albrecht; Youngkwan Cho; Aleksey Nogin (IEEE Trans. Neural Networks Learn. Syst., 2012)

Efficiently passing messages in distributed spiking neural network simulation. - Corey M. Thibeault; Kirill Minkovich; Michael John O'Brien; Frederick C. Harris Jr.; Narayan Srinivasa (Frontiers Comput. Neurosci., 2013)

5PM: Secure pattern matching. - Joshua Baron; Karim El Defrawy; Kirill Minkovich; Rafail Ostrovsky; Eric Tressler (J. Comput. Secur., 2013)

HRLSim: A High Performance Spiking Neural Network Simulator for GPGPU Clusters. - Kirill Minkovich; Corey M. Thibeault; Michael John O'Brien; Aleksey Nogin; Youngkwan Cho; Narayan Srinivasa (IEEE Trans. Neural Networks Learn. Syst., 2014)