Schmitt trigger-based single-ended 7T SRAM cell for Internet of Things (IoT) applications. - Kishore Sanapala; Ramachandran Sakthivel; Sang-Soo Yeo (J. Supercomput., 2018)

Ultra-low-voltage GDI-based hybrid full adder design for area and energy-efficient computing systems. - Kishore Sanapala; Ramachandran Sakthivel (IET Circuits Devices Syst., 2019)

ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems. - Grande Naga Jyothi; Kishore Sanapala; Vijayalakshmi A (Int. J. Speech Technol., 2020)

Parallelisation of machine learning models for credit card fraud detection. - J. Saira Banu; Sumaiya Thaseen Ikram; Vanitha Mohanraj; Kishore Sanapala; Polinpapilinho F. Katina (Int. J. Syst. Syst. Eng., 2023)

Image analysis in healthcare systems using approximate multi-bit adders. - Prasanna Kumar K.; M. Priyadharshni; Kishore Sanapala; Polinpapilinho F. Katina (Int. J. Syst. Syst. Eng., 2023)

Parallelization of Machine Learning Models for Credit Card Fraud Detection. - Polinpapilinho F. Katina; Kishore Sanapala; Vanitha Mohanraj; I. Sumaiya Thaseen; J. Saira Banu (Int. J. Syst. Syst. Eng., 2023)

Image analysis in healthcare systems using approximate multi-bit adders. - M. Priyadharshni; Kishore Sanapala; Polinpapilinho F. Katina; K. Prasanna Kumar (Int. J. Syst. Syst. Eng., 2023)